Instruction level energy model for the Adapteva Epiphany mul

Announcements of academic papers and technical reports based on Parallella or the Epiphany architecture.

Instruction level energy model for the Adapteva Epiphany mul

Postby jar » Mon Jun 19, 2017 9:16 pm

Title: Instruction level energy model for the Adapteva Epiphany multi-core processor
Available here: http://dl.acm.org/citation.cfm?id=3078892

I found this paper useful and interesting. I was left wondering about the bitwise/integer operations (bitshift, add, etc) or if those are considered the integer operations. Perhaps they didn't test the IALU2 instructions since they're close to the FPU performance?

The most relevant data is below:

Base energy cost










Parameter Energy(pJ)
Integer Operations17.93
Floating Point Operations29.39
Branch154.22
Local store47.99
Local load39.82
Pipeline Stalls53.65
Shared memory stores581.72
Shared memory loads2054.67
NOP17.07
Idle Cycle23.59


Base energy cost for remote loads and stores






Distance (Hamming from core 0)Load Energy (pJ)Store Energy (pJ)
1339.28112.51
2379.61117.96
3419.48123.34
4461.65128.47
5499.30134.21
6541.89139.22
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