U-Boot 2012.10-00003-g792c31c (Jan 03 2014 - 12:24:08) I2C: ready DRAM: 992 MiB WARNING: Caches not enabled SF: Detected N25Q128 with page size 64 KiB, total 16 MiB Out: serial Err: serial Net: zynq_gem Hit any key to stop autoboot: 0 Configuring PL and Booting Linux... Device: SDHCI Manufacturer ID: 3 OEM: 5344 Name: SL32G Tran Speed: 50000000 Rd Block Len: 512 SD version 2.0 High Capacity: Yes Capacity: 29.7 GiB Bus Width: 4-bit reading parallella.bit.bin 4045564 bytes read Error: Timeout waiting for FPGA to config. fpga - loadable FPGA image support Usage: fpga [operation type] [device number] [image address] [image size] fpga operations: dump [dev] Load device to memory buffer info [dev] list known device information load [dev] [address] [size] Load device from memory buffer loadb [dev] [address] [size] Load device from bitstream buffer (Xilinx only) loadmk [dev] [address] Load device generated with mkimage For loadmk operating on FIT format uImage address must include subimage unit name in the form of addr: reading uImage 4468792 bytes read reading devicetree.dtb 8667 bytes read ## Booting kernel from Legacy Image at 03000000 ... Image Name: Linux-3.12.0-g0bc9c3a-dirty Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 4468728 Bytes = 4.3 MiB Load Address: 00008000 Entry Point: 00008000 ## Flattened Device Tree blob at 02a00000 Booting using the fdt blob at 0x02a00000 Loading Kernel Image ... OK OK Loading Device Tree to 1fffa000, end 1ffff1da ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. Booting Linux on physical CPU 0x0 Linux version 3.12.0-g0bc9c3a-dirty (karol@karol) (gcc version 4.5.2 (Sourcery G++ Lite 2011.03-42) ) #6 SMP PREEMPT Wed Jan 29 10:25:25 CET 2014 CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache Machine: Xilinx Zynq Platform, model: Xilinx Zynq ZED bootconsole [earlycon0] enabled cma: CMA: reserved 40 MiB at 2d000000 Memory policy: Data cache writealloc PERCPU: Embedded 8 pages/cpu @c1607000 s9024 r8192 d15552 u32768 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 252432 Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=0 PID hash table entries: 4096 (order: 2, 16384 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Memory: 951304K/1015808K available (6201K kernel code, 374K rwdata, 2436K rodata, 188K init, 5307K bss, 64504K reserved, 237568K highmem) Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) vmalloc : 0xf0000000 - 0xff000000 ( 240 MB) lowmem : 0xc0000000 - 0xef800000 ( 760 MB) pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) modules : 0xbf000000 - 0xbfe00000 ( 14 MB) .text : 0xc0008000 - 0xc08777d8 (8638 kB) .init : 0xc0878000 - 0xc08a7340 ( 189 kB) .data : 0xc08a8000 - 0xc0905be0 ( 375 kB) .bss : 0xc0905bec - 0xc0e34a08 (5308 kB) Preemptible hierarchical RCU implementation. RCU lockdep checking is enabled. Dump stacks of tasks blocking RCU-preempt GP. RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. NR_IRQS:16 nr_irqs:16 16 slcr mapped to f0004000 Zynq clock init sched_clock: 16 bits at 54kHz, resolution 18432ns, wraps every 1207ms timer #0 at f0006000, irq=43 Console: colour dummy device 80x30 Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar ... MAX_LOCKDEP_SUBCLASSES: 8 ... MAX_LOCK_DEPTH: 48 ... MAX_LOCKDEP_KEYS: 8191 ... CLASSHASH_SIZE: 4096 ... MAX_LOCKDEP_ENTRIES: 16384 ... MAX_LOCKDEP_CHAINS: 32768 ... CHAINHASH_SIZE: 16384 memory used by lock dependency info: 3695 kB per task-struct memory footprint: 1152 bytes 1325.46 BogoMIPS (lpj=6627328) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 Setting up static identity map for 0xc05e08a0 - 0xc05e08d4 L310 cache controller enabled l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72360000, Cache size: 512 kB CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 Brought up 2 CPUs SMP: Total of 2 processors activated. CPU: All CPU(s) started in SVC mode. devtmpfs: initialized VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 regulator-dummy: no parameters NET: Registered protocol family 16 DMA: preallocated 256 KiB pool for atomic coherent allocations hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. hw-breakpoint: maximum watchpoint size is 4 bytes. bio: create slab at 0