Some time ago I bought an ADC evaluation card from Analog Devices
with the idea of making a 4 channel diversity receiver. Initially I tried a low en Xilinx FPGA board with FMC connector.
(The interposer board has to be modified to work with the Xilinx dev boards). While I had no problem getting data into the
dev board I ran out of resources.
With the arrival of the Parallella board I thought I would revisit this again. So at the moment I am in the process of deciding
the best way to connect the two. The PEC GPIO has enough differential IO on it to do the job. The board requires 2 lanes per
ADC channel a Data clock and a Frame clock plus some I2S.
Digikey stock the 80 pin TE Connectivity 2065769-1 used on the ADC board (they are very expensive at $20 each).
I think consuming all 4 channels will be a bit too much for a single Parallella board (8 GBits/s) so my current thinking
is to split the data and use 4 Parallella boards (eventually interlinked). I will however try to get it to work with
just one board before I waste more time and money on it.
I have not fully decided the topology of the system but I am leaning towards splitting the output of the ADC
on a custom board to 4 HDMI connectors, then another small custom board with HDMI and Samtec connectors.
Then using 4 HDMI cables to connect each of the Parallella boards. The cables will be the shortest ones I can
find to cut down on cable mismatching / losses. The Parallella boards would do some pre-processing
(DDC) then output that to a PC using 4 x 1 Gigabit Ethernet links where further processing would be done using
NVIDIA CUDA
This is a very long term project but I will follow this thread with interest. I am sure someone will come up with a
"I wish I had thought of that" idea. the system needs to be expandable so I can add more receivers (as cash allows).
Something like this looks interesting to do (click on overview)
- CharlesStatistics: Posted by G4GUO — Tue Nov 11, 2014 10:23 pm
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