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Parallella Community Supercomputing for Everyone 2017-04-27T02:28:50+00:00 https://parallella.org/forums/feed.php?f=13&t=4043 2017-04-27T02:28:50+00:00 2017-04-27T02:28:50+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18957#p18957 <![CDATA[Re: e_read and e_write... I don't get it]]>
The section of code that didn't use the auto increment was the tail where the remainder of 7-1 x 64-bits was executed. It did, however, put the add instructions between the ldr and str instructions again, which was somewhat clever. I am not familiar enough with the instruction set yet to see if it put two 16-bit instructions in, but it was pretty clever. Hand optimization of the generated code will only be slightly more clever--and the payoff isn't that great in the tail. The last tail where the 7-1 x 8-bits transfers were done was also sub-optimal, however, the optimizer was likely confused by the somewhat non-standard, and somewhat optimal, C/C++ code. A little hand optimization would probably also help there as well. It still was reasonably clever.

My conclusion is that the optimizations were pretty good. A person can probably do better, but nonetheless the compiler is pretty good. This is much better than the early (late 70's and early 80's) MIT compilers and assemblers I worked with. https://en.wikipedia.org/wiki/NuMachine

Statistics: Posted by GreggChandler — Thu Apr 27, 2017 2:28 am


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2017-04-26T21:12:19+00:00 2017-04-26T21:12:19+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18956#p18956 <![CDATA[Re: e_read and e_write... I don't get it]]> https://github.com/adapteva/epiphany-li ... mem_read.c
https://github.com/adapteva/epiphany-li ... em_write.c

Just so it's clear, the source code for memcpy is here:
https://github.com/adapteva/epiphany-gc ... c/memcpy.c
It is unoptimized, but the compiler does generate a "fast" word-aligned code path as I described. If the entire transfer were ldrb/strb byte operations, it would be particularly bad.

The DMA engine has some setup time which cannot be completely mitigated. At no point will a DMA transfer beat shmemx_memcpy because the Epiphany-III DMA engine is hobbled by hardware errata. It should not surprise you that your locmemcpy beats it.

The shmemx_memcpy does not return the dest address value to r0 like memcpy, so it's not exactly a drop-in replacement in some cases where the return value is required (it's generally not).

I could fix the e-lib implementation so that it would be higher performance in order to benefit people using it. But it's a poor interface that I don't believe in. It's not a standard API for any level of portability, uses a clunky/fragile 2D row/col interface to specify cores, doesn't manage memory, doesn't handle collective operations, doesn't provide atomic operations, doesn't guarantee memory ordering, and doesn't provide a simple DMA interface. If I were to re-define the interface to be better, it would end up looking a lot like the OpenSHMEM API.

Statistics: Posted by jar — Wed Apr 26, 2017 9:12 pm


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2017-04-26T16:57:55+00:00 2017-04-26T16:57:55+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18955#p18955 <![CDATA[Re: e_read and e_write... I don't get it]]>
I agree that it is surprising that auto increment is not used in the compiled code. I found the same to be true of my compiled code. The register optimizations in generated code could be better as well--but that is hopefully always true with hand optimized code. It was clear from the compiled code for my locmemcpy() that hand coding in assembly will improve it. I am not sure whether I want to learn yet another instruction set, however, it may be advantageous here. My C++ locmemcpy() code appears to max out at 2-bytes per cycle.

My locmemcpy() does appear to beat DMA at times, which does surprise me--especially with 1024-byte buffers. I had previously read the 300-byte transfer number referred to by nickoppen somewhere before--don't know where. Consequently, I expected DMA to beat my locmemcpy() always with 1024-byte buffers. It doesn't. That led me to suspect my test methodology.

The current code idles the non-active processors while the single core tests are executed, and wakes them up at the end of the test. Each test is repeated ten times on each individual core, and the combined core test is also repeated ten times.

test.txt

Statistics: Posted by GreggChandler — Wed Apr 26, 2017 4:57 pm


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2017-04-26T13:07:41+00:00 2017-04-26T13:07:41+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18954#p18954 <![CDATA[Re: e_read and e_write... I don't get it]]>
I've had success with the WAND barrier, but it only works if all 16 Epiphany cores participate. It is actually an optional experimental feature in the OpenSHMEM library for the shmem_barrier_all (you must enable it. default is a software barrier).

Statistics: Posted by jar — Wed Apr 26, 2017 1:07 pm


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2017-04-26T07:05:05+00:00 2017-04-26T07:05:05+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18952#p18952 <![CDATA[Re: e_read and e_write... I don't get it]]>
As an aside, my C++ locmemcpy() did generate ldrd/strd instructions.

Statistics: Posted by GreggChandler — Wed Apr 26, 2017 7:05 am


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2017-04-26T06:10:44+00:00 2017-04-26T06:10:44+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18951#p18951 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by jar — Wed Apr 26, 2017 6:10 am


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2017-04-26T05:41:49+00:00 2017-04-26T05:41:49+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18950#p18950 <![CDATA[Re: e_read and e_write... I don't get it]]>
I was unable to achieve 64 bits per instruction cycle. I presume that implies a problem with my methodology. What have I missed?

test.txt

Statistics: Posted by GreggChandler — Wed Apr 26, 2017 5:41 am


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2017-04-26T03:53:05+00:00 2017-04-26T03:53:05+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18948#p18948 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by jar — Wed Apr 26, 2017 3:53 am


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2017-04-26T00:04:04+00:00 2017-04-26T00:04:04+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18947#p18947 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by nickoppen — Wed Apr 26, 2017 12:04 am


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2017-04-24T13:34:26+00:00 2017-04-24T13:34:26+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18935#p18935 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by GreggChandler — Mon Apr 24, 2017 1:34 pm


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2017-04-23T13:29:52+00:00 2017-04-23T13:29:52+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18933#p18933 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by sebraa — Sun Apr 23, 2017 1:29 pm


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2017-04-21T13:00:45+00:00 2017-04-21T13:00:45+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18929#p18929 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by GreggChandler — Fri Apr 21, 2017 1:00 pm


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2017-04-21T10:56:45+00:00 2017-04-21T10:56:45+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18928#p18928 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by nickoppen — Fri Apr 21, 2017 10:56 am


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2017-04-21T04:25:02+00:00 2017-04-21T04:25:02+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18926#p18926 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by GreggChandler — Fri Apr 21, 2017 4:25 am


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2017-04-20T08:58:12+00:00 2017-04-20T08:58:12+00:00 https://parallella.org/forums/viewtopic.php?t=4043&p=18922#p18922 <![CDATA[Re: e_read and e_write... I don't get it]]> Statistics: Posted by sebraa — Thu Apr 20, 2017 8:58 am


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