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Parallella Community Supercomputing for Everyone 2021-11-17T13:54:12+00:00 https://parallella.org/forums/feed.php?f=23 2021-11-17T13:54:12+00:00 2021-11-17T13:54:12+00:00 https://parallella.org/forums/viewtopic.php?t=4370&p=20181#p20181 <![CDATA[Epiphany and Parallella Q & A • software renderer]]>
has anyone tried to write a software renderer for parallella?

thanks,

Marek

Statistics: Posted by marek — Wed Nov 17, 2021 1:54 pm

]]> 2019-09-05T10:00:31+00:00 2019-09-05T10:00:31+00:00 https://parallella.org/forums/viewtopic.php?t=4361&p=20143#p20143 <![CDATA[Epiphany and Parallella Q & A • Set the Stack Pointer Value]]> Statistics: Posted by SKyd3R — Thu Sep 05, 2019 10:00 am

]]> 2019-09-05T09:51:23+00:00 2019-09-05T09:51:23+00:00 https://parallella.org/forums/viewtopic.php?t=4359&p=20142#p20142 <![CDATA[Epiphany and Parallella Q & A • Re: Cyclic timer]]> Statistics: Posted by SKyd3R — Thu Sep 05, 2019 9:51 am

]]> 2019-08-07T21:34:01+00:00 2019-08-07T21:34:01+00:00 https://parallella.org/forums/viewtopic.php?t=4359&p=20127#p20127 <![CDATA[Epiphany and Parallella Q & A • Re: Cyclic timer]]> Statistics: Posted by jar — Wed Aug 07, 2019 9:34 pm

]]> 2019-08-02T10:59:37+00:00 2019-08-02T10:59:37+00:00 https://parallella.org/forums/viewtopic.php?t=4359&p=20124#p20124 <![CDATA[Epiphany and Parallella Q & A • Cyclic timer]]> Statistics: Posted by SKyd3R — Fri Aug 02, 2019 10:59 am

]]> 2019-06-28T01:22:47+00:00 2019-06-28T01:22:47+00:00 https://parallella.org/forums/viewtopic.php?t=4357&p=20118#p20118 <![CDATA[Epiphany and Parallella Q & A • where to buy 64 or 1024 epiphany processors?]]> Statistics: Posted by mostafa — Fri Jun 28, 2019 1:22 am

]]> 2019-01-03T16:07:45+00:00 2019-01-03T16:07:45+00:00 https://parallella.org/forums/viewtopic.php?t=3741&p=20110#p20110 <![CDATA[Epiphany and Parallella Q & A • Re: Measuring Power Consumption on the Parallella]]> Statistics: Posted by Gusvinhal — Thu Jan 03, 2019 4:07 pm

]]> 2018-11-24T19:41:28+00:00 2018-11-24T19:41:28+00:00 https://parallella.org/forums/viewtopic.php?t=4352&p=20104#p20104 <![CDATA[Epiphany and Parallella Q & A • Re: tutorials for design flow of zynq and epiphany together]]> Statistics: Posted by Min — Sat Nov 24, 2018 7:41 pm

]]> 2018-11-13T10:11:28+00:00 2018-11-13T10:11:28+00:00 https://parallella.org/forums/viewtopic.php?t=4352&p=20101#p20101 <![CDATA[Epiphany and Parallella Q & A • tutorials for design flow of zynq and epiphany together]]> Statistics: Posted by parallella-project — Tue Nov 13, 2018 10:11 am

]]> 2018-09-12T20:44:39+00:00 2018-09-12T20:44:39+00:00 https://parallella.org/forums/viewtopic.php?t=1714&p=20080#p20080 <![CDATA[Epiphany and Parallella Q & A • Re: Accessing HDMI (and other interfaces)]]> Statistics: Posted by claudio4parallella — Wed Sep 12, 2018 8:44 pm

]]> 2018-09-11T00:01:25+00:00 2018-09-11T00:01:25+00:00 https://parallella.org/forums/viewtopic.php?t=4295&p=20077#p20077 <![CDATA[Epiphany and Parallella Q & A • Re: replacing zynq chip on parallella desktop!]]>
I am propably running in the same issue. The stock of parallella boads with Zynq 7020 is nearly zero, in contrast to the 7010 versions (11th September 2018)


I had a look at the forum and at the schematic and pinout of 7020 and 7010 and they should be identical.
The powerup sequence and therefore the first stage bootloader seems to be the same. The difference comes only from the fpga pl part.
Page 3 Note 1 states that Zynq devices with the same package are pin to pin compatible.
And the epiphany processor is connected in the 7010 and 7020 the same way (looked at the fpga project).
So in my humble opinion you can try to resolder the zynq chip - which is not that cheap in at that low quantity. I would be very interested if you are successful!
And maybe you run into other issues, like bottom side components falling of the board while heating - I hope you have that in mind.

Best regards
Matthias

Statistics: Posted by MatthiasP — Tue Sep 11, 2018 12:01 am

]]> 2018-05-22T20:10:02+00:00 2018-05-22T20:10:02+00:00 https://parallella.org/forums/viewtopic.php?t=4295&p=19995#p19995 <![CDATA[Epiphany and Parallella Q & A • replacing zynq chip on parallella desktop!]]> does anybody know is it possible for pin compatibility and other issues like decoupling caps and so on! I mean is there any difference in parallella boards with this two type of fpga's after chip itself?

Statistics: Posted by voyager — Tue May 22, 2018 8:10 pm

]]> 2018-05-02T20:21:33+00:00 2018-05-02T20:21:33+00:00 https://parallella.org/forums/viewtopic.php?t=4286&p=19976#p19976 <![CDATA[Epiphany and Parallella Q & A • Re: Hardware loop end address]]> Statistics: Posted by upcFrost — Wed May 02, 2018 8:21 pm

]]> 2018-05-02T20:03:40+00:00 2018-05-02T20:03:40+00:00 https://parallella.org/forums/viewtopic.php?t=4281&p=19975#p19975 <![CDATA[Epiphany and Parallella Q & A • Re: GDB and simulator]]> Statistics: Posted by upcFrost — Wed May 02, 2018 8:03 pm

]]> 2018-04-04T13:46:30+00:00 2018-04-04T13:46:30+00:00 https://parallella.org/forums/viewtopic.php?t=4280&p=19961#p19961 <![CDATA[Epiphany and Parallella Q & A • Re: How To: Identifying which Zynq is on a board?]]> Statistics: Posted by olajep — Wed Apr 04, 2018 1:46 pm

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