Yes, you're right, that was the missing piece. As opposed to the timer mechanism, where an interrupt generation is always enabled, and occur whenever the timer reaches 0, the DMA engines behave slightly different. In order to enable DMA chaining, it was more efficient to implement an interrupt enable bit in the configuration register, then let the user reprogram the IMASK register per DMA task.Statistics: Posted by ysapir — Tue May 14, 2013 3:28 pm
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