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Parallella Community Supercomputing for Everyone 2016-05-20T19:20:24+00:00 https://parallella.org/forums/feed.php?f=23&t=3446 2016-05-20T19:20:24+00:00 2016-05-20T19:20:24+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=17626#p17626 <![CDATA[Re: Bare metal application with FPGA co-processor]]>
So it seems I have built a good bitstream with vivado 2015.4 and this version can be used for Parallela bitstreams.

Can't wait to try it out on the board!

Best,
Elias

Statistics: Posted by eliaskousk — Fri May 20, 2016 7:20 pm

]]> 2016-05-20T18:48:24+00:00 2016-05-20T18:48:24+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=17625#p17625 <![CDATA[Re: Bare metal application with FPGA co-processor]]>
Timing paths:
Based on where those paths are, those paths go to the reset synchronizer. I probably declared those as false paths and forgot to check them in to the constraints back in the fall.

Master:
Master branch needs to be updated to new oh modules for fifos. (either a path issue or a module rename issue)

Yes, your summary sounds good.

Andreas

Statistics: Posted by aolofsson — Fri May 20, 2016 6:48 pm

]]> 2016-05-20T19:15:27+00:00 2016-05-20T18:28:19+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=17624#p17624 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by eliaskousk — Fri May 20, 2016 6:28 pm

]]> 2016-02-26T09:25:32+00:00 2016-02-26T09:25:32+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16829#p16829 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by miguel_rodrigues — Fri Feb 26, 2016 9:25 am

]]> 2016-02-25T23:22:15+00:00 2016-02-25T23:22:15+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16828#p16828 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by aolofsson — Thu Feb 25, 2016 11:22 pm

]]> 2016-02-25T17:01:04+00:00 2016-02-25T17:01:04+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16827#p16827 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by miguel_rodrigues — Thu Feb 25, 2016 5:01 pm

]]> 2016-02-19T21:32:10+00:00 2016-02-19T21:32:10+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16803#p16803 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by miguel_rodrigues — Fri Feb 19, 2016 9:32 pm

]]> 2016-02-19T14:15:38+00:00 2016-02-19T14:15:38+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16798#p16798 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by aolofsson — Fri Feb 19, 2016 2:15 pm

]]> 2016-02-19T14:04:24+00:00 2016-02-19T14:04:24+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16797#p16797 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by sebraa — Fri Feb 19, 2016 2:04 pm

]]> 2016-02-19T08:13:44+00:00 2016-02-19T08:13:44+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16794#p16794 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by miguel_rodrigues — Fri Feb 19, 2016 8:13 am

]]> 2016-02-18T20:06:18+00:00 2016-02-18T20:06:18+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16790#p16790 <![CDATA[Re: Bare metal application with FPGA co-processor]]> Statistics: Posted by sebraa — Thu Feb 18, 2016 8:06 pm

]]> 2016-02-18T15:41:58+00:00 2016-02-18T15:41:58+00:00 https://parallella.org/forums/viewtopic.php?t=3446&p=16787#p16787 <![CDATA[Bare metal application with FPGA co-processor]]> Statistics: Posted by miguel_rodrigues — Thu Feb 18, 2016 3:41 pm

]]>