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Here's the key RTL code snippet..
assign ic_irq_select[IRQW-1:0]= ic_masked_ilat[IRQW-1:0] & //only if the ILAT bit is not masked by IMASK
~ic_ilat_priority_en_n[IRQW-1:0] & //only if there is no masked ilat bit <current
~ic_ipend_priority_en_n[IRQW-1:0] & //only if there is no ipend bit <=current
ic_global_en[IRQW-1:0]; //global vector for nested interrupts
always @ (posedge clk or posedge reset)
if(reset)
ic_irq_entry[IRQW-1:0] <= {(IRQW){1'b0}};
else if(clk_en)
if(~sq_ic_wait) // safety stall signal
ic_irq_entry[IRQW-1:0] <= ic_irq_select[IRQW-1:0];// & ~ic_irq_entry[IRQW-1:0] ;
assign ic_irq =|(ic_irq_entry[IRQW-1:0]); //interrupt pipeline
assign ic_flush =|(ic_irq_select[IRQW-1:0]); //flush pipeline
Statistics: Posted by aolofsson — Thu Sep 26, 2013 3:05 am
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