I have documented the pocess here
Bit stream I tested with doesn't include eLink, so I needed to terminate parallella-thremald service to avoid kernel crashes. I could load my bitstream, test it and then load back original with eLink, and tested that eLink is back with helloworld app.
Statistics: Posted by kirill — Sun Nov 15, 2015 7:48 am
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I'm an experienced embedded systems developer with experience of ARM, co-processors, FPGAs, embedded Linux and hardware. Despite this I'm finding there's a lot to learn with the Zynq SoC. Thanks for the link.
I will be adding my own IP to the PL, quite disjoint from eLink. You're right I'll need to modify the device tree and provide a Linux device driver for it.
Statistics: Posted by frodo — Fri Oct 30, 2015 8:48 am
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Are you adding custom IP to design? Have you got it working under Linux?
I have managed to use this guide:
http://www.fpgadeveloper.com/2014/08/cr ... ivado.html
to create a test custom IP and integrate it into headless design by replacing one of the "AXI interface converters" with "AXI interconnect". I have tested that it works, but only in bare metal mode. Linux seems to be much fiddlier, probably have to modify device tree to expose custom IP to Linux.
Statistics: Posted by kirill — Tue Oct 27, 2015 8:01 am
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So maybe it's as simple as that. Alternatively, my FPGA reload had no effect
Statistics: Posted by frodo — Mon Oct 26, 2015 10:07 pm
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Is this device driver going to get messed up by loading /dev/xdevcfg whilst running?
Statistics: Posted by frodo — Mon Oct 26, 2015 9:41 pm
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I won't want to keep rebooting to do this but will want to load the FPGA config from the Linux command prompt.
Are there any issues doing this?
I'm guessing I'd need to do something link
rmmod elink-module
cat image >/dev/xdevcfg
modprobe elink-module
Is there an e-link module? lsmod shows nothing so maybe the driver is built into the kernel.
If so what's the effect of loading a new image into the FPGA whilst Linux is running?
Thanks
Statistics: Posted by frodo — Mon Oct 26, 2015 9:29 pm
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