Interface to LCD Panel

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Interface to LCD Panel

Postby tnt » Sun Jun 08, 2014 12:01 pm

Hi,

I've been working on interfacing the parallella with some LCD Panel, in particular those using a MIPI-DSI interface and last night I finally reached the point where I can send some form of video data to it (well, a test pattern really) :

Image
http://i.imgur.com/UhtMMT5.png
https://www.youtube.com/watch?v=zkO06TDTRaw


The screen is a Kindle Fire HD 7inch display. I selected it because:
* It's reasonably sized compare to the parallella. 8 or 9 inch would also have worked.
* It's readily available for cheap ( around 60$ )
* It has a capacitive multi-touch front, with a controller integrated and a pre-existing linux driver for it.
* It has a good resolution, 1280x800. It's good enough to display a lot, but low enough so the data rate is reasonable ( 1.6 Gbps ), at least for a first try.
* It has a MIPI-DSI interface. Things like the latest iPad display use eDP interface which can't be driven with the FPGA IOs of the parallella.
* I managed to find the datasheet for it. And also being from the kindle, the u-boot bootloader of the kindle is available as source and I was able to find the proper initialization seqence for it (which as it turns out doesn't match the datasheet ...).

It's connected to the parallella via a stack of two boards. The bottom one is a gpio breakout I made that brings out all the gpio to pin headers as length matched differential pairs. The top board performs the PHY level adaptation to talk to the display. The

This is very much a hackish setup atm, just to prove the concept. I'll now start on a better breakout board with everything on it and once the whole thing is ready and usable, I'll publish the CAD files and VHDL sources.

WRT to the touch screen, I couldn't find the connector pinout, but with a bit of guess work I was able to figure it out and I successfully talked to it and made it appear as a input device on linux, so no issues there.
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Re: Interface to LCD Panel

Postby 9600 » Mon Jun 09, 2014 8:06 am

That is very cool indeed!

Are you still thinking about doing a board that integrates the Myriad-RF 1 module also? Or do you have some other plans involving the touchscreen?

Cheers,

Andrew
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Re: Interface to LCD Panel

Postby shodruk » Mon Jun 09, 2014 9:01 am

Great!!!!! That's really cool!!!!
LCD + touchscreen + Parallella = Mobile Parallella!!!!!!!!!!!!!!!!!!!
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Re: Interface to LCD Panel

Postby tnt » Mon Jun 09, 2014 11:19 am

9600 wrote:Are you still thinking about doing a board that integrates the Myriad-RF 1 module also? Or do you have some other plans involving the touchscreen?


Yes, that's still the plan. However I'm running out of GPIOs. The test I made with the zedboard parallella prototype was just using parallell interface, but that would require 14 fpga pins for TX, 14 for RX and then 4 for the SPI control and that's a lot, that's like 66% of all GPIOs available. So I'm looking into using a serdes chips to convert the myriadrf parallell interface to a a fast LVDS serial link to save GPIOs.
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Re: Interface to LCD Panel

Postby aolofsson » Tue Jun 10, 2014 7:52 pm

sylvain,

This is awesome on so many levels!!!

-Do you have a link to a MIPI DSI spec? These seem very difficult to get a hold of. :D Amazing how some organizations only publish a "standard" specifications to organization members!!
-What part of the protocol was done in the zynq and what was done on your adapter board? "phy level adaption?"

Thanks,
Andreas
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Re: Interface to LCD Panel

Postby tnt » Tue Jun 10, 2014 9:07 pm

Thanks.

Sorry I don't have any direct link to the specs handy, but I got them from google. You need 3 of the specs, D-PHY for the physical layer, DSI for the serial protocol and then DCS for the command set.

The protocol is entirely done in the zynq. It's a minimal controller, I only support forward transmission (so no registers readback or stuff like that). It supports LPDT transmissions which I use for the init sequence and then it can transmit any HS packets (with some length restrictions for lane alignment). Over this layer I have a sync generator that will send the right packets at the right time to follow the so-called "Non-Burst Mode with Sync Events" mode.

The board only has exactly 30 resistors on it ... however that version of the phy takes 20 GPIOs which is too much. It also has quite a bit of power dissipated in those when in 'low power mode' (like about 200 mW wasted in heat). The next version will use 5 dual LVCMOS12 buffers to reduce the GPIO count to 16, reduce the resistors to 20 and cut down static power in LP mode to zero.

I'll try to add some frame buffer + DMA soon. But currently the design is pretty small. ~ 700 LUTs and 450 FFs only.
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Re: Interface to LCD Panel

Postby tnt » Thu Jun 12, 2014 8:32 pm

Now with a frame buffer : http://imgur.com/nhZ1ObM

This is just a quick hack using the Xilinx VDMA core. No proper linux driver, I just manually loaded data at the correct address in memory.
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Re: Interface to LCD Panel

Postby ZenoArrow » Wed Aug 06, 2014 6:05 pm

tnt wrote:Now with a frame buffer : http://imgur.com/nhZ1ObM

This is just a quick hack using the Xilinx VDMA core. No proper linux driver, I just manually loaded data at the correct address in memory.


Impressive! What's the next step?
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Re: Interface to LCD Panel

Postby tnt » Fri Aug 08, 2014 9:00 am

I'm designing a more durable daughter board for it. But since my final application is SDR, it will also have interface to the Myriad RF. And since there is not enough GPIO to do just simple connections to both the screen and the SDR, I need to do some clever stuff with high speed serializer / deserializer so it's taking a bit of time.
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Re: Interface to LCD Panel

Postby voyager » Sat Sep 19, 2015 9:59 am

Hi tnt!
I want to do something like your work but I've some problems! did not buy this board yet!
my work is to read data from another card's LVDS pins and do some DSP math and after all show the results on the screen like SDR!
how hard can it be to do this with this board? do you have any suggestion for my work which make it easier?
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