Ideas for daughter cards?

[eleitl]

It would be nice to be able to break out all the spare FPGA I/O pins to a
number of suitable (e.g. micro-DisplayPort or micro-HDMI, perhaps with
a custom protocol with LVDS and cut-through for transit traffic) cables, so that
one could implement a subset of MPI directly in the Zynq and build a
3d torus/grid of individual boards with such cables.

[LYNX]

As far as I understand(correct me if I'm wrong), the main advantage the daughter card gets and which is inaccessible by other Parallella interfaces, is extremely high bandwidth.

So, it would be good to utilize that advantage.

Extensions off top of my head which require high bandwidth:

1. Fast data acquisition.
For every project which requires THAT amount of data flowing in, I think interface board will be developed individually. And I don't think it will be widespread.

2.Disk
This WILL find application I think, because there will likely be situations where on-board Parallella memory would be insufficient, or it will process data so fast (at that many Gflops that likely ), that bandwidth to HDD will be the limiting factor...
As it is in many today's computers. Having increased processor power, gotta make sure some other components will keep up, right? Otherwise potential inevitably limited...

So, if say there will be daughter board with some kind of 128GB-1TB SSD with bandwith 1+GBps, that would be very good. Super HDD for supercomputer . That with right software for Epiphany could make, for example, award-winning video editing station surpassing those 10x more expensive... . Lightning fast server/database applications is nice also.

3.Network
Being able to process data quickly often means high external data flow;
So, it would be rational having option of increasing bandwidth capacity by making daughter board with few Ethernet Gbit or even 10Gbit ports.

Also, such a board may solve most problems for those who want data acquisition; They may just utilize transition into ethernet(often already existing), network hubs if necessary, and then through such a daughter board into Parallella.

[shodruk]

High bandwidth and low latency "scratchpad" memory board.

This is like a manualy managed L2 cache memory.
I think ZYNQ's memory controller has not enough spec for Epiphany.
If Epiphany had a direct link to high speed memory, I think Epiphany will run more and more effectively.

[theover]

No matter what you dub an extra amount of RAM to, it stands or falls with the availability of a ram interface and sufficient pins with the required bandwidth, and that is both somewhat of a problem after the age of static rams with standard interfaces. Maybe some of that age can return...

I'd at least hope the free Xilinx Webpack ISE can run some form of serious IO interface with accessible pins, then at least a lot of basic applications and extensions can be easily enough covered.

[shodruk]

In the future, I think the problem is solved by the 3D stacking memory.
With 3D stacking SRAM/DRAM, Epiphany will have more local memory or shared scratchpad memory on the chip.

[MaxHeadroom]

Do we think there will be enough after-market support to create commercial daughter cards, separate from Adapteva?
6000 cards is plenty, so hopefully....
Or does Adapteva have any daughter card plans in their business plan?

[9600]

[MaxHeadroom]

So answer is after-market products from the industri and hobbyists.

With those numbers you could be right.

Cheers/M

[eas]

[stealthpaladin]