[Porcupine] Pin Mapping, Voltages and Other Questions

Sub forum for Parallella daughter cards and accessories

Moderator: Folknology

[Porcupine] Pin Mapping, Voltages and Other Questions

Postby miguel_rodrigues » Wed Jun 08, 2016 3:42 pm

Hi there,

I have been using Parallella Embedded (Zynq 7020) for a couple of months and have recently acquired a Porcupine board but I have not used it yet. My main interest is FPGA development and finally, it's time to use the available GPIO. However, I have some questions and I wonder if you might help me:

- The Parallella Manual (http://www.parallella.org/docs/parallella_manual.pdf) says that the "PEC_FPGA includes 48 bidirectional signals that can be configured within the Zynq device to support a number of different signal standards, including LVCMOS and LVDS". However in the Porcupine board, I only see 24 pins connected to the PEC_FPGA. What is the relationship between these 24 pins and the aforementioned 48 IOs?

- Is it possible to use LVCMOS33 or only LVCMOS25? What about LVTTL?

- Table 7 in Parallella Manual (regarding pin assignments) is incomplete. What is the mapping between the Zynq pins and GPIOs?

- Porcupine also comes with a PMOD. To which Zynq pins are the PMOD IOs connected? Are they connected to the PL part of the Zynq?

Many thanks in advance :D

PS: The reason I want to use the Porcupine is to be able to debug my FPGA designs and to interface Parallella with other hardware such as (other) FPGAS and image sensors.
miguel_rodrigues
 
Posts: 15
Joined: Thu Feb 18, 2016 3:29 pm

Re: [Porcupine] Pin Mapping, Voltages and Other Questions

Postby miguel_rodrigues » Fri Jun 17, 2016 9:59 am

Sorry for bothering again, I have discovered some thing but yet they are not enough :cry:

Already found out the pin mapping between Parallella board pins and FPGA pins regarding GPIO (in files parallella_z70x0_loc.xdc and parallella_z7020_loc.xdc).

It is also stated in these files that
Code: Select all
#  NOTE:  IOSTANDARDS for e-link and gpio have been removed
#    from these files.  IOSTANDARDS are to be set in the
#    verilog instead.


As I understand, IOSTANDARDs may be LVDS, LVCMOS33, LVCMOS25, LVTTL, etc. I understand that, from the Zynq side, I am able to use whatever IOSTANDARD I want. What I do NOT understand is:

-> Is it possible to connect a single-ended signal to the GPIO pins in the Porcupine and receive it on the Zynq?
-> May I use LVCMOS33 or LVCMOS25 or whatever I want in the Porcupine without worrying?

If anyone knows the answer to these two questions I would be very happy if you shared it :D

Thanks in advance
miguel_rodrigues
 
Posts: 15
Joined: Thu Feb 18, 2016 3:29 pm

Re: [Porcupine] Pin Mapping, Voltages and Other Questions

Postby miguel_rodrigues » Fri Jun 17, 2016 12:45 pm

Ok, new update :)

I have been experimenting with this and I am now able to use the 48 GPIOs of Porcupine/Parallella. I am using them with LVCMOS25 but I would like to know if I may use them with LVCMOS33 without frying the board. Maybe this is a dumb question, I am almost certain that I can use such standard but I can not afford another Parallella if I fry this one. So:

Is it safe to use LVCMOS33 for using the GPIO?

Thanks in advance :)
miguel_rodrigues
 
Posts: 15
Joined: Thu Feb 18, 2016 3:29 pm

Re: [Porcupine] Pin Mapping, Voltages and Other Questions

Postby aolofsson » Fri Jun 17, 2016 8:32 pm

I wouldn't recommend that, but the GPIO voltage can be changed to 3.3V through the I2C. I think patc used 3.3V for his audio project?
Here is an example how to modify the epiphany voltage as a starting point.

viewtopic.php?f=49&t=2285

Sorry, can't help out more than that right now...
User avatar
aolofsson
 
Posts: 1005
Joined: Tue Dec 11, 2012 6:59 pm
Location: Lexington, Massachusetts,USA


Return to Daughter Cards & Accessories

Who is online

Users browsing this forum: Google [Bot] and 1 guest

cron