Where in the Parallella literature does it discuss porting a serial c program to the epiphany
chip to take advantage of the 16 cores? I know it must say something about it
someplace.
Also, where is the source (on the Parallella website) for the c program demonstrated in a video that shows
how much faster a epiphany ported matrix-multiplication c program is than its serial version?
I believe in the video that the Parallella that was used had 64 cores.
Any help appreciated.
Thanks in advance.
Respectfully,
Lou_Reed