I am looking for a way to trace the code running on the different epiphany cores with a decent temporal resolutions. What I want to be able to produce in the end is something like this:
Do you know of a way to collect that data on the arm core?
If I let the epiphany write to the shared memory and let the arm core poll that data, the epiphany would need to wait until the ARM core signalized that the data was read. This would impact the performance quite a lot, and even worse, the execution of the epiphany would depend on the current CPU usage of the arm core.
If I implemented a software fifo in the shared memory, the code would have race conditions, as there are no locks.
Another idea, I had ony my mind was to add a component in the fpga, where a hardware fifo was mapped both to the arm core and the epiphany. The component itself would add a timestamp. After searching, if this already existed, I found the In the fpga repository. Unfortunately it seems to be WIP. What is it's state? I could not see if it is already included in a released bitfile. Is this the case? I am relatively familiar with ISE, but am just downloading vivado.
Do you have any other ideas how to get the required values?
Best regards
Raphael