First of all, great effort, keep up the good work!
2. Secondly, to quote the almighty reference manual: "4.5 Program Fetch Alignment Restrictions - All instructions must be aligned on halfword boundaries."
This includes both 16 and 32-bit instructions.
Therefore lines 1173-1176 in ecore_cl.h don't make any sense, you should rather just test for PC&0x01, outside the switch statement.
3. Also, when testing against masked values (such as op & 0x0F) you might just want to use a shortened form of writing values, by only stating those bytes relevant (i.e. 0x0F rather than 0x0000000F), makes for better readability.
4. The base address of the memory mapped register area is 0x000F0000 (0x0F0000), not 0x00F00000 (e.g. read_memory32(core, 0x00F06000 + RN) would not be correct). Maybe use a #define, rather than using nondescript hex numbers?
Have a look at
https://github.com/adapteva/epiphany-li ... e/e_regs.h, maybe adopt that?
5. __kernel void ecore(__global int column, __global int row): op is read _outside_ the while(1) loop, therefore the same opcode is continually executed.
6. if(op & 0x01 || op & 0xF == 0xE || op & 0xF == 0xA) is enough to decide, whether an opcode is 16 bit or not, a bit more concise.
I therefore propose this instead:
http://pastebin.com/fbuR5vWc(raise_interrupt is yet to be defined)
by Gravis » Mon Jul 01, 2013 6:56 pm 
