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A specific decoding task for the Adapteva board

https://parallella.org/forums/viewtopic.php?f=20&t=80

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A specific decoding task for the Adapteva board

PostPosted: Thu Dec 27, 2012 5:34 pm
by booth
Hi All,
If there will be an Adapteva ADC/DAC daughter board, I would like to implement a 10 Mbps QPSK demodulator.
I have used FPGA 's for this task and wonder how we can implement such a demodulator inside the Adapteva board?
Can expensive FPGA's be replaced by the Epiphany processor for this task?
Any Ideas?

Re: A specific decoding task for the Adapteva board

PostPosted: Thu Dec 27, 2012 8:24 pm
by aolofsson
Do you have a C or matlab reference implementation of the function that you can send along? It would be very interesting to compare your current FPGA implementation in terms of of system gates and block RAM with the number of Epiphany cores needed to reach the same performance.