Power issues

[Shimrod]

Has anyone done an analysis about the "high" power dissipation?
Nothing seems to have been said about this, but I'm thinking about possible "soft" ways
of optimizing.

Is the Zynq the culprit or other chips?
If it is the Zynq is it the ARM subsystem or the FPGA Fabric?

I believe the ARM can be throttled depending on load but it if it is the logic, then is
it possible to improve clock gating?

Cheers
Rolf

[hochopeper]

[tnt]

Well the power dissipation isn't all that high, it's pretty much the predicted 5W. It's just that dissipating 5W on such a small surface isn't easy :p

[hochopeper]

0.5W saved by disabling the HDMI controller in FPGA http://www.parallella.org/2014/05/13/fp ... expansion/