Synchronization between Zynq and Epihany.

Any technical questions about the Epiphany chip and Parallella HW Platform.

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Synchronization between Zynq and Epihany.

Postby mgeras » Mon Jun 30, 2014 3:13 pm


So I got my parallella about a week ago and I'm looking at the esdk code base as well
as the interface between the Zynq and Epiphany. I have worked with Zynq based boards
before and have a couple of questions for the future ESDK version. Looking at the documentation,
it seems there is no "clean" way to synchronize data between the ARM and the Epiphany. In all
the examples, the ARM core either usleep()s or polls a register on the Eiphany to
determine when something is ready for consumption. This is very inefficient.

So the question is what are the future plans for the ESDK regarding host synchronization? I noticed
the ephipany-libs git repo has updates to use /dev/epiphany. Is this going to be a linux UIO
implementation or a custom driver? I would hope that is the case because it provides the easiest
method to bring the interface from the ARM to the epiphany to userspace applications. Plus, if the
fpga bitstream is modified to support interrupts, it could also provide a path for synchronization. The
linux UIO subsystem exposes interrupts in a novel way by allowing the userspace application to sleep
via a read() call.

Do you guys have any other ideas? I would like to know your thoughts on this.

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Re: Synchronization between Zynq and Epihany.

Postby aolofsson » Fri Jul 11, 2014 9:48 pm

We are working on more advanced drivers (visible in our git commit history..). If you need a solution now, then the better way is for the ARM to poll on an address in the shared DRAM section and for the Epiphany to set that bit when done. Using usleep() is never the answer... :D
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Re: Synchronization between Zynq and Epihany.

Postby mgeras » Sat Jul 12, 2014 12:52 am

Agreed. With the current codebase, that's the only solution. I was looking at the epiphany sdk and it uses /dev/epiphany as the device to use for mmap()ing the memory/process address space. Then I looked at the parallella github page and the kernel, and it looks like it's missing the updates for exposing the device the way the library is being used.

I'm trying to maximize the data throughput from the ARM to the Epiphany part. It will require DMA to get the best performance. I'm currently looking at the driver code for the the zynq dma controller and seeing what it will take to grab send/receive buffers to the Epiphany part.

Anyways, thanks for the info.
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