Synchronization between Zynq and Epihany.
Posted: Mon Jun 30, 2014 3:13 pm
Hey,
So I got my parallella about a week ago and I'm looking at the esdk code base as well
as the interface between the Zynq and Epiphany. I have worked with Zynq based boards
before and have a couple of questions for the future ESDK version. Looking at the documentation,
it seems there is no "clean" way to synchronize data between the ARM and the Epiphany. In all
the examples, the ARM core either usleep()s or polls a register on the Eiphany to
determine when something is ready for consumption. This is very inefficient.
So the question is what are the future plans for the ESDK regarding host synchronization? I noticed
the ephipany-libs git repo has updates to use /dev/epiphany. Is this going to be a linux UIO
implementation or a custom driver? I would hope that is the case because it provides the easiest
method to bring the interface from the ARM to the epiphany to userspace applications. Plus, if the
fpga bitstream is modified to support interrupts, it could also provide a path for synchronization. The
linux UIO subsystem exposes interrupts in a novel way by allowing the userspace application to sleep
via a read() call.
Do you guys have any other ideas? I would like to know your thoughts on this.
Thanks
So I got my parallella about a week ago and I'm looking at the esdk code base as well
as the interface between the Zynq and Epiphany. I have worked with Zynq based boards
before and have a couple of questions for the future ESDK version. Looking at the documentation,
it seems there is no "clean" way to synchronize data between the ARM and the Epiphany. In all
the examples, the ARM core either usleep()s or polls a register on the Eiphany to
determine when something is ready for consumption. This is very inefficient.
So the question is what are the future plans for the ESDK regarding host synchronization? I noticed
the ephipany-libs git repo has updates to use /dev/epiphany. Is this going to be a linux UIO
implementation or a custom driver? I would hope that is the case because it provides the easiest
method to bring the interface from the ARM to the epiphany to userspace applications. Plus, if the
fpga bitstream is modified to support interrupts, it could also provide a path for synchronization. The
linux UIO subsystem exposes interrupts in a novel way by allowing the userspace application to sleep
via a read() call.
Do you guys have any other ideas? I would like to know your thoughts on this.
Thanks