High speed data aquistion and storage
Posted: Tue Aug 05, 2014 9:07 pmHi,
I just got my board (sweet!). I just got one to play around with but looking at it gave me an idea...
I am looking into the feasibility of using the parallella to receive data from an ADC and storing that data locally.
The ADC I have in mind is: ADS5474 which is a 14-bit, 400-MSPS analog-to-digital converter (ADC).[ ref: http://www.ti.com/product/ads5474] . The ADC would generate data at 800MBps. To interface the 2 I'd have to build a custom daughter card of course (and work out the pin conversions!). Anyway, Table 19 in the reference manual says the PEC_FPGA port has a peak b/w of 2.8GBps. What is the sustained b/w over this port?
Also, since the ADC will present 800MBps, I have to be able to store the data at that speed too. What are my options for this?
Thanks in advance.
I just got my board (sweet!). I just got one to play around with but looking at it gave me an idea...
I am looking into the feasibility of using the parallella to receive data from an ADC and storing that data locally.
The ADC I have in mind is: ADS5474 which is a 14-bit, 400-MSPS analog-to-digital converter (ADC).[ ref: http://www.ti.com/product/ads5474] . The ADC would generate data at 800MBps. To interface the 2 I'd have to build a custom daughter card of course (and work out the pin conversions!). Anyway, Table 19 in the reference manual says the PEC_FPGA port has a peak b/w of 2.8GBps. What is the sustained b/w over this port?
Also, since the ADC will present 800MBps, I have to be able to store the data at that speed too. What are my options for this?
Thanks in advance.