Parallella Community

Are talking about the register that is called "RESETCORE" in the architecture manual? What exact addresses are you writing to?

You have to be very careful with using the reset register this way. If there is any ongoing transaction related to that core ongoing at the time that the soft reset happens "bad" things could happen. A safer method would be to first "debughalt" the neighboring core, make sure nbobody is communicating with the core, making sure all the DMAs in that core are stopped, and then assert the reset sequence.


What code are you running. There are more variables in the initial structures needed than just the core row/col id if you use the e_read/e_write calls iirc.

Can you tried running the simplest possible program that does not elib to make sure that your concept works? (it should...)

Andreas

Hello Andreas,

I stopped all cores (by writing 1 to E_REG_DEBUGCMD), then executed the reset, as you suggested, followed by reloading the memory, then resumed everything. Unfortunately, the cores keep getting stuck at the same location, after some time.

//raphael