Hello...
The Parallella manual mentions that the GPIO pins are per LVDS standard. In a way some H/W newbie questions:
1) Are these pins high input voltage and high output current protected?
2) What are the upper and lower voltage for the logic levels? What are the max ratings for analog IO?
3) Is the output to these pins also in pairs? Is it the same for analog IO?
4) The Zynq 7000 manual seems to refer to single pins, and there isn't much reference to LVDS. So is the Parallella board translating single pin voltages to LVDS?
5) Many signals I can think of working with are not differential, so are there any devices/ICs that do this readily? Same question but for the output.
6) Does the software need to read each pin pair and determine the difference? Or only one logic level is presented?
Am I missing the correct manual to refer to for these questions?