Off core read-writes
Posted: Fri May 10, 2013 9:45 pmOh, and a follow-up question:
In Figure 6 why isn't there a (0,0) core? The lowest seems to be (32,32).
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Posted: Fri May 10, 2013 9:45 pmRe: Off core read-writes
Posted: Fri May 10, 2013 9:47 pmRe: Off core read-writes
Posted: Fri May 10, 2013 10:14 pmRe: Off core read-writes
Posted: Fri May 10, 2013 10:40 pm@timpart is right. From a programmer's point of view, the read transaction is an atomic operation. The mesh hardware is the one responsible to generating the return transaction.
Essentially, what happens is that the transaction is sent to the remote site with a "read" attribute, where the return address is a (an implied) parameter sent along. At the destination, a new, "write" transaction is generated, where the destination address is that implied address, and the data is the required remote data.
Just curious, are you trying to write a cycle-accurate simulator? Otherwise, why not use e-run?
Essentially, what happens is that the transaction is sent to the remote site with a "read" attribute, where the return address is a (an implied) parameter sent along. At the destination, a new, "write" transaction is generated, where the destination address is that implied address, and the data is the required remote data.
Just curious, are you trying to write a cycle-accurate simulator? Otherwise, why not use e-run?
Re: Off core read-writes
Posted: Fri May 10, 2013 10:46 pm