Schematic/Spec Review

[Gravis]

[aolofsson]

Christian, Gravis:

All files for the gen0 board can be found at (including Orcad, allegro, etc, etc):
https://github.com/parallella/parallella-hw

If you want to learn about the board and do review, the gen0 files should be fine. If you want to start a daughter card and need the exact dimensions of the connectors, you will need to wait until tomorrow for the gen1 files. Note that the difference between the gen0 and gen1 boards are minor.

Andreas

[aolofsson]

[tnt]

[tnt]

* Would swapping HDMI D11 and D16 with some of the GPIO also on bank 34 be possible ? Those are currently connection on MRCC pins and that could always be useful to have those on GPIOs. (MRCC standing for Multi Region Clock Capable - i.e. they connect to a clock distribution network spanning several clock regions rather than 1 for the SRCC pins and non-clock-capble at all for "normal" pins).

* I'd like to make this work on battery and so far the best option I can see would be to plug on the 3 pin header J14 so that I get the 2 possible 5V input and I take care of feeding the voltage from the battery (converted to 5v, although that might actually work without). But I'd still like to be able to force the 'turbo mode' pin from like a battery monitor, but currently it's not possible because it's forced low when the 5v input is _not_ present. I think it would be better to revese that logic so that multiple open-collector driver can drive it low to enable turbo mode.

* And as I stated earlier on the topic of PEC_POWER, I'm not conviced that having every rail there is useful (unless we can feed them through there but feeding > 1.5 A through 2 pins only seems a bit risky). To me pretty much the voltages that are used for IO on the pins are useful (so 2v5 and 3v3 and the raw 5v in of course).

[aolofsson]

Sylvain,
Thanks for the inputs regarding the pin swap and turbo_mode. We will consider it and make a decision tomorrow.
Andreas

[8l]

FYI, about FOSS HDMI thing, check
http://hipstercircuits.com/finally-a-wo ... tible-lcd/

[tnt]

@Andreas:

Thanks.

btw, I just had a look at the variable vdd_gpio thanks for pointing it out. I had missed the fact the hdmi chips input could take anything from 1.8 to 3.3v. The default voltagee output of that regulator seems a bit high when compared to the nominal specs of the chips it powers. For the component onboard, I guess you took that in consideration and deemed it OK, but a note about it for daugter card designer would be useful, especially the vdd_adj that starts at 3v3 rather than the 1.8v marked on the schematic. And 2.9v rather then 2.5v for the vdd_gpio.

Cheers,

Sylvain

[fakir]

@aolofsson, I just saw your post and since I’m building a similar system, it was a shock for me to read and find out that I was missing caps in bulk too, it’s a typical example of something one could easily skip in such circumstances. @Sundance, you mentioned that using a copper landing pad on the upper layer includes risks, issue is, everything does but if you compare the advantages gained vs the risk taken, that’ll be a good one and if it was me, I’d have gone on with it.