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Re: RAW and WAW hazard avoidance
Posted:
Thu Aug 08, 2013 5:03 pm
by ysapir
An instruction should execute as soon as it can. I don't see how stalling the AND for having dual issue with the FADD (or a similar combination) can help in accelerating any program? In this case there will be no dual issue.
Re: RAW and WAW hazard avoidance
Posted:
Thu Aug 08, 2013 9:09 pm
by Gravis
@ysapir
can you confirm if the proposed method is in fact who it's done on the epiphany chip? i really would like to get this right for the emulator.
Re: RAW and WAW hazard avoidance
Posted:
Mon Jul 14, 2014 11:55 am
by timpart
It seems from Notzed's experiments that a floating point instruction can delay a IALU instruction by dual issuing with it then discovering that the FP instruction's registers aren't ready. See , the part after the "Update" .
Tim
Re: RAW and WAW hazard avoidance
Posted:
Thu Jul 17, 2014 1:29 pm
by notzed