The ABI - why the ARM legacy?

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The ABI - why the ARM legacy?

Postby notzed » Tue Aug 13, 2013 12:36 am

So i'm curious as to why the ABI follows the ARM ABI so closely. It seems only to bring baggage that adds complexity, and imo hampers one of the features of the cpu - "zero-page" registers. I presume there is no need for any backward compatability with earlier revisions which have fewer registers for example.

Just off the top of my head, wouldn't something like the following make more sense?

r0-r7 arguments/scratch (caller save, or perhaps all scratch)
r8-r31 caller save
r32-r63 callee save

(the actual split point could be based on something more emperical than the beauty of symmetry)

with:
r63 link pointer (only hardware specific register, specifically at the end for that reason)
r62 stack pointer
r61 ... frame pointer/segment pointer, constants, whatever, etc.

Or perhaps even r63=pc for pc-relative addressing (if arm can justify it with only 16 registers, it's probably useful), r62=sp, etc. (obviously this isn't going to happen due to hardware requiring changes).

For example, having r4-r7 callee save puts a big break on being able to write tiny call-tree-leaf routines that use as many page-0 registers as possible for compactness. And are they all that useful in the caller? Obviously this is a trade-off, so it might not make much difference either way in practice but aesthetically and by 'gut-feeling', it just doesn't look optimal.

Apart from the use of r12 as the link register, the rest is purely a toolchain/software issue.
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Re: The ABI - why the ARM legacy?

Postby Gravis » Tue Aug 13, 2013 12:57 am

notzed wrote:So i'm curious as to why the ABI follows the ARM ABI so closely.

umm... isnt that a compiler issue? you can always take things up with the GCC folks. the ARM stuff is just a host so why does it matter? there are far more important things to do than mess with a known-to-work system.
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Re: The ABI - why the ARM legacy?

Postby notzed » Tue Aug 13, 2013 1:33 am

I'm talking about the epiphany abi. Last time I looked ARM didnt have 63 registers ...

Gravis wrote:
notzed wrote:So i'm curious as to why the ABI follows the ARM ABI so closely.

umm... isnt that a compiler issue? you can always take things up with the GCC folks. the ARM stuff is just a host so why does it matter? there are far more important things to do than mess with a known-to-work system.
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Re: The ABI - why the ARM legacy?

Postby Gravis » Tue Aug 13, 2013 1:50 am

notzed wrote:I'm talking about the epiphany abi.

so what ABI would you suggest?
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Re: The ABI - why the ARM legacy?

Postby ysapir » Tue Aug 13, 2013 2:21 am

The one he described in his first post, above :-)
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Re: The ABI - why the ARM legacy?

Postby notzed » Tue Aug 13, 2013 3:32 am

Gravis wrote:
notzed wrote:I'm talking about the epiphany abi.

so what ABI would you suggest?


Well apart from suggesting something, i'm simply curious as to the thinking that lead to the current one. Was it deeper than 'just start with armeabi'? Perhaps there is 16-register-hardware history of which i'm unaware, or emperical analysis to back up the register allocations, exediancy wrt toolchain porting, or some other reason.

I presume that it's a question only Adapteva and/or Embecosm could answer, although it's no big deal if they don't.
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Re: The ABI - why the ARM legacy?

Postby Gravis » Tue Aug 13, 2013 5:35 am

ysapir wrote:The one he described in his first post, above :-)

hahaha! that's totally egg on my face. :P
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Re: The ABI - why the ARM legacy?

Postby tnt » Tue Aug 13, 2013 5:59 am

IIRC the first 16 registers only can be used when using the 'short instructions' mode.
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Re: The ABI - why the ARM legacy?

Postby Gravis » Tue Aug 13, 2013 6:14 am

tnt wrote:IIRC the first 16 registers only can be used when using the 'short instructions' mode.

do you mean the first 8? the 16-bit instructions can only use the first 8 registers because they only have 3 bits to specify which register to use. :P
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Re: The ABI - why the ARM legacy?

Postby ysapir » Tue Aug 13, 2013 8:07 pm

tnt wrote:IIRC the first 16 registers only can be used when using the 'short instructions' mode.


Not quite - the rule is that if all regs in the instruction are r0-r7, then the instruction can be encoded as 16-bit op.
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