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Parallella Community • View topic - What does RESETCORE do?

What does RESETCORE do?

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

What does RESETCORE do?

Postby alexrp » Wed Dec 25, 2013 10:42 pm

It's unclear what happens when this register is used to reset the core.

* Does the PC jump to 0x00000000?
* Are any other registers reset to some kind of default state? If so, what are they?
* When is RESETCORE cleared?
* Does resetting the core through this register cause it to continue executing after resetting, or does it go into a halted state?
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Re: What does RESETCORE do?

Postby aolofsson » Thu Jan 02, 2014 3:58 am

Writing a 1 to bit [0] of the RESETCORE register will put the core in a reset state. Writing a 0 to bit[0]of the RESETCORE register takes it out of reset. We chose not to document this register because we currently recommend that the whole system is reset together. If users start resetting cores while other cores are starting to access that core,then the eMesh can get locked up. There is also the issue of outstanding transactions returning to the core after RESET has been deasserted. The RESETCORE "reset" has the same effect as hardware reset, but to a reduced set of logic. At reset,the following happens:
-certain registers are reset to their reset values (as specified in the register table). This includes among other things the PC, STATUS, CONFIG,IRET,ILAT, etc.
-All internal hidden core state machines are reset (not visible to user)
-After reset, the core is idle (STATUS[0]=0) waiting for an interrupt to get started.
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Re: What does RESETCORE do?

Postby alexrp » Thu Jan 02, 2014 4:00 am

Which table are the default values documented in? I don't think I'm seeing it.
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Re: What does RESETCORE do?

Postby aolofsson » Sun Jan 05, 2014 9:29 pm

Sorry..I may have deleted that column in the last version of the manual to save space and forgot to add a summary note.

No reset values:
R0-R63
DMASRCADDR
DMADSTADDR
DMASTRIDE
DMAUTO{0,1}

All others:
Reset to zero
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Re: What does RESETCORE do?

Postby alexrp » Sat Jan 11, 2014 6:18 pm

By the way, is issuing TRAP prone to eMesh lockup issues like writing to RESETCORE?
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Re: What does RESETCORE do?

Postby timpart » Mon Jan 13, 2014 12:29 pm

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Re: What does RESETCORE do?

Postby mhonman » Mon Jan 13, 2014 2:22 pm

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Re: What does RESETCORE do?

Postby aolofsson » Mon Jan 13, 2014 4:22 pm

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Re: What does RESETCORE do?

Postby timpart » Wed Jan 15, 2014 12:39 pm

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Re: What does RESETCORE do?

Postby alexrp » Sat Feb 08, 2014 2:30 am

How does MBKPT work? Will it set DEBUGSTATUS[0,2] across all cores?

Also, does a 00 debug command actually clear *both* HALT and MBKPT_FLAG?

Finally, @aolofsson: Does "no reset value" mean these registers should preserve their values across RESETCORE modification, or does it mean "undefined values, may or may not be zero"?
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