Critical heating issue

[timpart]

Andreas said in kickstarter that a heatsink for the Zynq is being included.

According to the datasheet the Epiphany 16 is square, 15mm per side. Mold + integral heatslug 0.8mm high, the chip is 1.5mm in total height including pins.

Tim

[magorian]

Andreas or Tnt:

>> The zynq has a built in temp sensor that can be accessed from linux if the device tree if properly setup.
>
> Any tips on making that work with lm-sensors for those of us not Zinq-savvy would be appreciated, given the extreme heat even if it > is within spec.

Till you guys solve the heat issue, tips on making lm-sensors or comparable package work with the Zinq temp sensor would be appreciated, thanks.

Dan

[tnt]

I'll post my device tree entry when I get back home (at 30C3 atm).

[tnt]

Hi,

I just did a quick test by deconfiguring the fpga and the power dropped by more than half and the ARM runs 40deg cooler (without heatsink, 55C vs 95C). It'd be interesting to generate a bitstream without HDMI and just the e-link. I would guess there is a whole buch of people that don't really care about the video output and just plan for headless operation.

I also looked at the device tree and it seems correct and in /sys you can find the xadc node but somehow on the new board they are "raw" adc reading rather than a 'celsius' or 'volt' reading ... no idea why. I guess the kernel doensn't have the proper driver ?

Cheers,

Sylvain

[aolofsson]

Hi Sylvain,

Thanks for the feedback and good point regarding the headless operation and power! Certainly the power of the programmable logic is significant so it would be a good option. We are rechecking the kernel build options to see what we forgot to include. There seem to be some other driver components missing as well:-)

Andreas

[ed2k]

[hamster]

How much of the FPGA is HDMI using?

I would be happy with the option to just run DVI-D - which would use only a fraction of the logic, however there would be way to get sound to a monitor...

[timpart]

[greytery]

Hi,

I'm one of those who expects to run my Parallellas (x 2!) headless, and if that can minimise heat issues, so much the better!!

Seems logical that most/all of the boards in a Parallella Cluster would run headless. So a standard (i.e. tested) headless OS build option would seem to be a good idea.

I cant (yet) try the headless image which is supposed to be on the ftp site. Will that image be updated to include the findings of the investigation into switching off the HMDI?

While we're at it, what other parts of the logic could be switched out (if that reduces power/heat)? Say - USB?

tery

[mark03]

Just curious, was there a Xilinx XPE estimated power for your FPGA bitstream? If so, how far off is it from measured? I found the Xilinx note on increased power in the "CES" Zynq devices, but as bad as that is, it is still < 50% increase overall for Z7020.

(I thought the pre-order Parallellas were built with production Zynqs anyway. Not true?)

Just to add one more configuration request: Some of us would really like an image where the Epiphany and e-link support is stripped out, and the Epiphany is turned off I realize that is not a priority at this point.