What makes the FPGA wheels turn

[hamster]

[drjohnsmith]

I've Done a few Zynq FPGA board designs,

heatsink,
if your using the board 'at home' then put the biggest heat sink on it you can,
it does no intrinsic harm keeping the thing cool, and if you crank the two arms up and the fpga,
then that small zynq package is trying to dump a good fer watts.

power supply,
like a lot of us , still awaiting my board, so not certain how the on board psu will stack up,
but the zynq can certainly chew power if your not careful,

Re ARM to external interface,
The internal bridge between the zynq arm and the fabric has a very high bandwidth, but relativly long latency,
the arms are AP , not the M's, so aimed at running an OS, not real time,
to do a single cycle access from the ARMs to the FPGA fabric is of the order of 200 ns,

A cheap Zynq board,
Yes, this is low cost, the xilinx boards are 10 times this cost, the Zed board is 3 or 4 times more, and the mini zed is about twice, but I'm not expecting parallella to offer much support for the Zynq, this is a parallella board, the zynq is just a means of accessing the other chip. If you want to debug or program the Zynq side, I don't expect Xilinx or the zed team to know too much about this board.

yes I'm going to play with the Zynq on the board, but I'm hoping the zynq side will just work,

[theover]

IIRC the process to change the FPGA logic into containing user components would be to:

Make sure the Xilinx tools 14.x (to support the 7010/7020) work

Load the existing FPGA design from Adapteva in source form

Add the user logic

Silicon compile the composite

put the resulting .bit file somewhere in the start-up part of the Parallella board flash disk

reboot.

Am I right ?

Theo V.

[drjohnsmith]

your right , ish

I use Vivado , and ISE is effectively EOL,

but yes, its just..
rather like its just about going fast enough to get into space,

as to the zynq FPGA source code, if its released or not I dont know, its owned by parallella ,

On Zynq, the FPGA bit file gets merged into the software boot loader of the ARM. I use the Xilinx SDK to merge the fpga bit file into the boot loader file,

BTW: Its normal to distribute FPGA bit files in encoded form, as else they can be reverse engineered,

opencores might have a solution, I've not contributed to them for a year or two now, but might be worth a look,