OS4E

Re: OS4E

Postby 8l » Sat Jan 12, 2013 11:15 pm

hi, choose compiler & os

compiler : llvm for arm.
http://llvm.org/docs/HowToBuildOnARM.html

os: baremetal os (it is for x86_64 and written in pure assembly, but it is really simple)
http://www.returninfinity.com/baremetal.html
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Re: OS4E

Postby mrgs » Sun Jan 13, 2013 7:30 am

@jeremybenett : Thank You for Your best wishes! :)
@8l : Well, thank You for Your comment, but please let me give a notice:
- compiler : we need a toolchain for Epiphany CPU not for ARM, (luckily we have one, based on GNU's tools). LLVM : a little competition at the tools area is also welcome.
- OS: It is a quite hard to port an assembly written OS from one arch (x86_64) to another 'very' different one.
Regards, Gabor
| OS4E : A preemptive, multiprocessing, microkernel based OS for Epiphany ARCH |
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Re: OS4E

Postby mrgs » Sun Jan 13, 2013 6:53 pm

Hi All, I have just finished first read and make some notes about 'epiphany_arch_reference_3.12.12.18'. I have posted some typo. But here and now I have to share some 'OS' related important notes:
++ The 'mesh.memory_map': 32-bit, flat, unprotected, BUT(!) via the periodically set MEMPROTECT reg I 'hope' some semi protection.
+ Well separated memory BANKS,
+ The cMesh can accept writes at the cores 'speed' (nice inter-core communication) -- : but read?!
+ Nice DMA engine without CPU usage! (as usually) (!) The independency point of view is more important than 'acceleration'. :)
- Caller must save all(?!) FSR,
+/- We need an external agent to start CPU(s),
- GID: SET IT IMMEDIATELY(!) on an IT occurring. (!) Before another higher can occur?! (!) FIXME
+ All instruction are available as both 16- and 32-bit instructions (REG0-7, -large immediate contains) (!) minimize code size(!)
+/- Except Load/Store. ALL OTHER INSTRUCTIONS ARE RESTRICTED TO USING REGISTERS(!)
+ post-modify auto-increment addressing: ... stack-pop operation(!)
+++ TESTSET RD, [RN, RM]
++ writing ILATST and ILATCL using MOVTS instruction : used to degrade the interrupt priority
+ Dual-ISssue Scheduling Rules.
- DMA does not flags errors on incorrect usage(!)
++ event timers for real-time events with nice sources(!)
--- CTIMER{0,1} at the zero counter stops?! and IT issued. (!) FIXME
+ TRAPs
Well, It is nice. I have to understand and examine some function more deeply via some test code. Regards, Gabor.
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Re: OS4E

Postby ysapir » Mon Jan 14, 2013 5:16 am

@mrgs,

I am not sure if that's what you're asking, but the timers stop when reaching zero (assuming that they where not stopped by writing the CONFIG register). Possibly (depending on the IMASK register), there is an interrupt event at the end of the count.
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Re: OS4E

Postby Oneill » Mon Jan 14, 2013 10:14 am

Hi,

My research field is the operating systems, I'm currently working on OS for many core processors.
So good to hear that not only me want to write an OS for this nice processor.
In theory:
I have checked your which list and I think it's really hard to fulfill.
In theory the MACH kernel design fits for such a processor architecture only the upper layer is questionable due to its size (in case of XNU the BSD layer size is too big).
It's design for system with multiple processors but unfortunately much earlier then the CPU technology reach the certain level ( nowadays level maybe )

In practice:
I'm waiting for my board to try the first context switch :)
Well design OS should hide the difference between the Epiphany with 16/64/4048 :) cores from the user code.

Regards,
Oneill
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Re: OS4E

Postby mrgs » Mon Jan 14, 2013 8:23 pm

@ysapir : Thank You for Your answer. Well, I have to collect myself to put clear and exact questions. I do the best. So : with my previous (!) FIXME(s):
- FIXME #1 : IT handling routine: Well 'as usually' I am going to start IT handler with GID as soon as possible. Is it enough to 'protect' the 'current' handler routine from higher priority IT? Please confirm it.
- FIXME #2 : Solved?! Why stops the CTIMER{0,1} at zero? How can I 'restart' the counting? The countdown is nice for me?! I guess, the answer for this question: This is the 'nature' of CTIMER. So, I have to handle it via IT handling routine to put the proper value for the 'next' countdown to zero which will occur a nice IT again. Is it a real 'real-time'? Well it is depend on the value for counting and the 'frequency' of the event source. Am I right? --- average_running_time_of(TIMER_IR_ROUTINE) << CNT / FEQ(TIMER_SOURCE) --- Please confirm it.
Regards, Gabor
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Re: OS4E

Postby mrgs » Mon Jan 14, 2013 8:49 pm

@Oneill: Welcome in the club. :) Thank You very much for Your comment, it is very-very important for me. Your message is: THERE IS ONE MORE MIND(!) Nice. Well, my list is my target, I think, it is possible to reach these points. As soon as clarify some unclear things regarding to THE ARCH, I will share the details. --- 'Oops...' I need a repository to store the source. --- I could not wait until I receive my board(s): I am going to test several things under 'a simulator'. Yes, I agree, OS should be well designed and fit for E16/64... Regards, Gabor
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Re: OS4E

Postby fmotta » Mon Jan 14, 2013 9:02 pm

Hehe - Os-9: A really nice OS I had to write custom device drivers to allow it to use my prototype double-density 5-1/4" Floppy drive. Nice, loved it. Wish it had more longevity.
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Re: OS4E

Postby LamsonNguyen » Tue Jan 15, 2013 1:24 am

Good point, Oneill. I certainly hope that our code can be used with whatever generation Epiphany chip we have.
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Re: OS4E

Postby ysapir » Tue Jan 15, 2013 6:11 am

mrgs wrote:IT handling routine: Well 'as usually' I am going to start IT handler with GID as soon as possible. Is it enough to 'protect' the 'current' handler routine from higher priority IT?


Should be, according to Figure 14.


mrgs wrote:This is the 'nature' of CTIMER. So, I have to handle it via IT handling routine to put the proper value for the 'next' countdown to zero which will occur a nice IT again.


Right.


mrgs wrote:Is it a real 'real-time'?


If set to count clock cycles, then it is effectively a RTC.
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