notzed,

Good catch!! I had forgotten about that "optimization". This was one of the critical path so I took some liberties, load stores work on register pairs.

For good measure, here is the complete decode logic

Dual issue happens only if none of these conditions are true:

--RAW CODE

//load-->load

assign iab_waw_00_de = iab_op0_wr_rd0_write_de &

iab_op1_wr_rd0_write_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_wr_rd0_addr_de[RFAW-1:1]);

//load-->ialu/fpu

assign iab_waw_01_de = iab_op0_wr_rd0_write_de &

iab_op1_wr_rd1_write_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_wr_rd1_addr_de[RFAW-1:1]);

//ialu/fpu-->load

assign iab_waw_10_de = iab_op0_wr_rd1_write_de &

iab_op1_wr_rd0_write_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:1]==iab_op1_wr_rd0_addr_de[RFAW-1:1]);

//ialu/fpu-->ialu/fpu

assign iab_waw_11_de = iab_op0_wr_rd1_write_de &

iab_op1_wr_rd1_write_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:0]==iab_op1_wr_rd1_addr_de[RFAW-1:0]);

//ialu-fpu-->rn-read

assign iab_raw_10_de = iab_op0_wr_rd1_write_de & iab_op1_rd_rn_read_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:0]==iab_op1_rd_rn_addr_de[RFAW-1:0]);

//ialu-fpu-->rn-read

assign iab_raw_11_de = iab_op0_wr_rd1_write_de & iab_op1_rd_rm_read_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:0]==iab_op1_rd_rm_addr_de[RFAW-1:0]);

//ialu-fpu-->store

//note: matching on odd/even

assign iab_raw_12_de = iab_op0_wr_rd1_write_de & iab_op1_rd_rs_read_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:1]==iab_op1_rd_rs_addr_de[RFAW-1:1]);

//ialu-fpu-->acc-fpu

assign iab_raw_13_de = iab_op0_wr_rd1_write_de & iab_op1_rd_acc_read_de &

(iab_op0_wr_rd1_addr_de[RFAW-1:0]==iab_op1_rd_acc_addr_de[RFAW-1:0]);

//load-->rn-read

assign iab_raw_00_de = iab_op0_wr_rd0_write_de & iab_op1_rd_rn_read_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_rd_rn_addr_de[RFAW-1:1]);

//load-->rm-read

assign iab_raw_01_de = iab_op0_wr_rd0_write_de & iab_op1_rd_rm_read_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_rd_rm_addr_de[RFAW-1:1]);

//load-->store

assign iab_raw_02_de = iab_op0_wr_rd0_write_de & iab_op1_rd_rs_read_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_rd_rs_addr_de[RFAW-1:1]);

//load-->acc-fpu

assign iab_raw_03_de = iab_op0_wr_rd0_write_de & iab_op1_rd_acc_read_de &

(iab_op0_wr_rd0_addr_de[RFAW-1:1]==iab_op1_rd_acc_addr_de[RFAW-1:1]);

//store-->ialu/fpu write

assign iab_war_hazard_de = iab_op0_rd_rs_read_de & iab_op1_wr_rd1_write_de &

(iab_op0_rd_rs_addr_de[RFAW-1:1]==iab_op1_wr_rd1_addr_de[RFAW-1:1]);