Parallella Community

So I just noticed that since r15 doesn't alias the programme counter, the arm mechanism of implementing pc-relative addressing wont work.

After a bit of searching it seems movfs can be used to access the PC, and I presume from that one could emulate a "load effective address" opcode. Although without assembler + linker support, the offset would need to be manually calculated and only work within single compilation units.

An 11-bit signed lea psuedo-op could be implemented using 2 instructions without requiring additional registers, movfs and add immediate. Is this, or some alternative mechanism planned/in the works for e-gas?

I also noticed that for all the language forums there isn't one for assembly language, although I wouldn't be fussed if it stayed that way.

Well it is a reduced instruction set ...

Fair points. LEA is probably the sort of thing you could mimic with a parameterised macro. In fact there's a fair bit of scope for macro use with Epiphany to emulate 'higher' operations typical of CISC's.

The other one I see is not there is a COMPARE ie. set the flags as per the difference of two operands, but no modification of said operands. But that wouldn't be hard to mimic, just pick some register as scratch for the destination to a SUB.

As for an assembly language forum : I'd be happy to see one and contribute. Surely there must be more than two of us prepared to crawl over broken glass across the software landscape.

Cheers, Mike.

I've just created an as requested.

It's sort of half way between M(inimal)ISC and RISC, but with my few experiments so far haven't been hampered by that. The addressing modes - as usual - help make up for some of it with the simple/compact code they allow. Non destructive compare is an obvious stand-out as hewsmike noticed, but it's minor.

2 instructions to implement lea would be fine even if it wasn't reduced . An absolute lea for resolving far labels might also be handy. I guess I was wondering if it should have assembler support (analagous to the = syntax on arm, or lea on 68k), or just leave it to a macro/manual.

One of my initial thoughts on utilising the cores was a 'shader' based mechanism that used async dma to hide code and data overlays, and my first approach would be to utilise PIC to allow flexibility; and then i noticed the compiler didn't support it. So I went to look how it could be done. Of course, even in plain C there are ways around this such as a custom function call table using a base pointer. I'm leaving that idea on hold for the moment whilst i get more familiar with the device.

Thanks for creating the assembly forum too. IMO The small instruction set, lots of registers, and small memory size makes both hand assembly and (dynamically) generated code approaches that will be used.

We are currently working on PIC support for the purpose of supporting overlays. Within the old git repository layout there are branches parallella-gcc-4.8-overlay for epiphany-gcc and overlay-dev for epiphany-sourceware which can be used to see what there is so far.