Parallella Community

Hi,

I'm a new Parallella player. I had your project from Github > Opened in Vivado > Manually import constrains and sources into (The files were in project folder but not showed up on Vivado) > I hit Run behavior Sim and I had this problem:

ERROR: [VRFC 10-2063] Module <elink2_top> not found while processing module instance <elink2_top_i> [C:/Users/Kien/Desktop/parallella-fpga-abc1d5671a7cd59e706661a582075c0815de5ee7/7010_hdmi/7010_hdmi.srcs/sources_1/bd/elink2_top/hdl/elink2_top_wrapper.v:180]
ERROR: [XSIM 43-3322] Static elaboration of top level Verilog design unit(s) in library work failed.

Here is my project structure: https://www.mediafire.com/?ed44m8dj2hzdtqn

I'm not sure what went wrong. Would you help me with this please? Thank you for your time.

Best
Kien

Hi Kien,

From the look of your output you are using windows. I have only used ubuntu to build the fpga. My user guide is at https://github.com/peteasa/parallella/w ... -7020_hdmi. The makefile has a few simple steps that you can run by hand.. First build the AdiHDLLib (https://github.com/peteasa/parallella-f ... akefile#L7). This creates the Analog Devices HDL libraries that are needed... you might try that first (https://github.com/peteasa/parallella-f ... /AdiHDLLib).

Once the Adi libraries are available the top level make file builds the oh source (https://github.com/peteasa/parallella-f ... akefile#L9). Actually building the oh source is independent of building the Analog Devices HDL libraries so you could try building the oh libraries separately.

Once both the Adi libraries and the oh libraries are available the fpga should be relatively easily built. I am using a tcl script that tells vivado where to find the libraries (set_property "ip_repo_paths" https://github.com/peteasa/parallella-f ... mi.tcl#L54). If you try to load the xpr project file before the libraries have been built then nothing will work for you!

Now you know the basic steps that are needed, have a go in the windows environment running the top level make file and see if that helps you. If not you will have to build each library separately or perhaps create a virtual machine and load the linux version of Vivado!!

Hope this helps.

Peter.

Hi promach,

Thanks for having a go with the FPGA build.. The following seems quite important - vivado: Command not found -

I have a user guide that you might like to try and follow at https://github.com/peteasa/parallella/w ... ng-started. In particular look at the section "Installing required software for Xilinx fpga development". Once installed follow the guide at https://github.com/peteasa/parallella/w ... -7020_hdmi.

Hope this helps

Peter.