### Instruction level energy model for the Adapteva Epiphany mul

Posted:

**Mon Jun 19, 2017 9:16 pm**Title: Instruction level energy model for the Adapteva Epiphany multi-core processor

Available here: http://dl.acm.org/citation.cfm?id=3078892

I found this paper useful and interesting. I was left wondering about the bitwise/integer operations (bitshift, add, etc) or if those are considered the integer operations. Perhaps they didn't test the IALU2 instructions since they're close to the FPU performance?

The most relevant data is below:

Base energy cost

Base energy cost for remote loads and stores

Available here: http://dl.acm.org/citation.cfm?id=3078892

I found this paper useful and interesting. I was left wondering about the bitwise/integer operations (bitshift, add, etc) or if those are considered the integer operations. Perhaps they didn't test the IALU2 instructions since they're close to the FPU performance?

The most relevant data is below:

Base energy cost

Parameter Energy | (pJ) |
---|---|

Integer Operations | 17.93 |

Floating Point Operations | 29.39 |

Branch | 154.22 |

Local store | 47.99 |

Local load | 39.82 |

Pipeline Stalls | 53.65 |

Shared memory stores | 581.72 |

Shared memory loads | 2054.67 |

NOP | 17.07 |

Idle Cycle | 23.59 |

Base energy cost for remote loads and stores

Distance (Hamming from core 0) | Load Energy (pJ) | Store Energy (pJ) |
---|---|---|

1 | 339.28 | 112.51 |

2 | 379.61 | 117.96 |

3 | 419.48 | 123.34 |

4 | 461.65 | 128.47 |

5 | 499.30 | 134.21 |

6 | 541.89 | 139.22 |