Epiphany Assembly and multicore CPUs

[8l]

How do you treat low level programming in epiphany?
I.E. assembly programming in epiphany.

my question is limited by my poor english,
so i am asking something similar with below question(but for epiphany not x86):
http://stackoverflow.com/questions/9809 ... -look-like

[ed2k]

like in normal multicore cpu, each epiphany core has its own local cache (But with different address). The instruction inc reg X is stored in different memory address when each cpu core execute the instruction it needs to first loaded the instruction into its internal storage unit (an execution register).

[ysapir]

The Epiphany architecture is essentially similar to the description in the thread you link to. This means that each eCore is a separate CPU, which has it own register set, peripherals and local memory. However, the core's memory can be easily accessed by any other core.

As opposed to an x86 processor, the Epiphany will more often than not will be a co-processor. This means that normally, code will be loaded on an idle core and then the host will generate a "SYNC" interrupt to get the core start fetching the program code (this can be done just as easily by a neighbor core).

Once started, each core runs a program totally separated from the other cores. However, inter-core communications is possible via memory movements and/or interrupts.

[ysapir]

[Gravis]

in more simple terms, each core on the Epiphany processor runs it's own program. it looks like (and is) normal assembly code. the difference is that the programs for the cores have to be distributed when the Epiphany processor "boots up".