‘in-memory’ computing architecture

Forum for anything not suitable for the other forums.

‘in-memory’ computing architecture

Postby 8l » Sun Nov 26, 2017 1:14 am

in-memory seems quite interesting.

IBM scientists say radical new ‘in-memory’ computing architecture will speed up mputers by 200 times
http://www.kurzweilai.net/ibm-scientist ... -200-times
(Left) Schematic of conventional von Neumann computer architecture, where the memory and computing units are physically separated. To perform a computational operation and to store the result in the same memory location, data is shuttled back and forth between the memory and the processing unit. (Right) An alternative architecture where the computational operation is performed in the same memory location. (credit: IBM Research)
Posts: 173
Joined: Mon Dec 17, 2012 3:23 am

Re: ‘in-memory’ computing architecture

Postby jar » Mon Nov 27, 2017 7:22 pm

This is cool, but the GeSbTe phase change memory they're using has an endurance of perhaps 10^6 cycles. Because it cycles at about 35 Mbit/s, this means you can destroy the memory in just 28 milliseconds of use. So...not quite useful until memory endurance improves.

Another problem/challenge I see with these techniques is that baking logic in a memory process or memory in a logic process is inefficient.
User avatar
Posts: 294
Joined: Mon Dec 17, 2012 3:27 am

Return to General Discussion

Who is online

Users browsing this forum: Majestic-12 [Bot] and 10 guests