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epiphany_arch_reference_3.12.12.18.pdf

page 22
-last sentence in rMesh section has an extra period
-the penultimate sentence in the xMesh section has a misplaced hyphen.

Hope I'm not being too pedantic with the laundry list of errors.

Shouldn't it be "ADD <RD>, <RN>, #IMM3" rather than "ADD <RD>, <RN>, #SIMM3"? (same goes for SUB and 11 bits)
I mean, adding a signed constant seems rather pointless, if subtracting is available.

//edit
ADD R2,R1,#-100 is shown as an example, so apparently we are indeed talking about signed values.
That would restrict the SIMM3 variant to [-4;3]

Also, FIX,FLOAT and FABS all state RM somewhere, though only 1 register is involved.

when is the new version of the documentation coming out? >_<

this is more of an lack of inclusion of data issue.

while i'm sure it's possible deduce using Table 22: Pipeline Stage Description, it would be nice if somewhere it explicitly said how many cycles a particular operation took. i realize multiple opcodes use the same mnemonic, so i'm not sure how that information would be arranged. perhaps an additional column on Table 38: Epiphany Instruction Decode Table?

This is not necessarily an error per se, wording and consistency really. Picky me

Take, say, page 102 ( of architecture reference ) describing the LDR(DISPLACEMENT) instruction :

address= RN +/- IMM<<( log2(size/8)-1);

Now I've got the idea that one scales the displacement/offset as per the chosen data size ( BYTE, HALF, WORD, DOUBLE ), and that one appends either B/H/W/D as appropriate to the tail of the mnemonic ( hence LDRB/LDRH/LDRW/LDRD ).

However for that bit shift of the immediate operand to the left, the size parameter ( my red emphasis ) only makes sense if it represents the number of bits of the operand thus :

address= RN +/- IMM<<( log2(size/8));

Eg. page 52 gives <size> as being one of B,H,L,D but here we mean <size> is one of 8/16/32/64 .... have I got that right ??

[ Likewise for the other instructions using that construct ]

[ Also the example on page 102 mentions LDRS, and while we know that designates a "short" : would a short be a byte or a halfword ? ]

Cheers, Mike.

( edit ) My apologies if this has already been picked up, but I couldn't find that on searching ....

More on the traps.

The architecture reference 4.13.09.29 has a table of the "other" traps (i.e. other than syscall) as follows:

0-2: reserved
3: program exit indicator
4: indicates success
5: indicates assertion
6: reserved

As of esdk 5.13.07 (and corresponding to the current head on github), the following are implemented in libgloss/epiphany/epiphany-syscalls.c (but so far I haven't found any code that generates traps 4 and 5)

0: asm_write
1: asm_read
2: asm_open
3: asm_exit - is definitely used, and corresponds to documentation
6: asm_close - occurs in real-world programs, but is not documented.