routing uses simplex method and every bit var has 2 address

[Ben.F.Rayfield]

In this network, routing uses the simplex method and every bit var has 2 address

Starting with 32 bit addressses, as IPv4 is mostly full and any part is likely to be able to respond at least to someone, there are at most 32 hops from any bit variable (many nands based logic gate) to any bit variable anywhere in the world who chooses to join this network.

Their choice to join the network exists only in the effects they have on the network. Theres no list of members at this logic level, but those who want to be in lists or make lists about others can of course compute and talk about such lists using the bit variables.

Everything on the Internet and computers is made of bit variables, and it will continue to work that way as people and automated systems may choose to join networks based on this simple design.

To ensure maximum flexibility, bit variables have 2 addresses each, one for bit0 and one for bit1, but since the network is similar to quantum uncertain, no bit variable knows if it is a bit0 or bit1. It only knows that when it crosses a hop in the network, exactly 1 bit has changed.

The shape of the network is deterministic and high dimensional, starting with 32 dimensions, 1 dimension for each bit in IPv4. You cross 1 dimension at a time until reaching some destination and then observe, statistically or by proof of the known nands (between any 2 different vars) and xors (between you and your opposite, but neither knows which bit value the self or other is at first but may figure it out by looking at the nands between them).

The shape of the network is an abstract idea and does not depend on physical location or IPv4 address or which routers you actually go through. The shape of the network is a social network keeping Dunbars Number in mind, which is about 150 people or things in the world each person can understand the connections between). Because of Dunbar's number and Simplex method which describe the same thing here, each bit variable touches only those 32 other vars or optionally its variable length addresses and is expected to expand as memory mapping of GPUs and VMWares and Hypervisors and supercollider computers etc choose some place in the network to say the parts of their system are at, and if the rest of the network finds their communications consistent with the nands and xors they already know and have confidence in, then they become just another fact in the network, a relation of nands between their bit vars and ours and any combinations that are found to be true most often. Its statistical and expected to be used like a boltzmann machine or hopfield network to make it run faster, but it can represent any exact logic including the logic of the bits in word documents and games, if we knew what that logic is and those things got hooked in.

The gametheory of the network will be held together by each (observed by 32 or more others from different dimension each) bit var publishing and keeping updated a 32 bit integer whose bits tell which of their peers have a nand relation with this self var. I'm undecided if it needs to be 64 bits because the nands can be between self and the other bit0 or bit1. Xor between self and opposite of self simply means only 1 version of you can be bit0 and the other must be bit1. Your 2 branches together form all possible values of a bit variable and recursively into the network everything that implies.

It is an error for 2 bit vars who are eachother's peers (route directly touching eachother) to disagree on the nand of that pair of vars (us 2 vars). If we both say nand is false, then we must both be true/bit1. If we both say nand of us is true, then theres 3 ways we could exist together: both bit0, self is bit1 and other is bit0, or self is bit0 and other is bit1.

I'm not entirely sure if the statistical view of what vars are true/false aligns right with which of bit0/bit1 (as an internet address) you happen to be, but that's the paradox of quantum uncertainty and simplex method. Its something to be explored, figuring out as we go what are useful strategies for getting our peer bit vars to communicate, in whatever language of sequence of their bit values we somehow together decide to use, in a way that results in us finding the information we wanted in the network, like predicted values of bit vars at certain addresses which may be IPv4, may have port, may be IPv6 up to 128 bits, may be SHA256 hashcode of any bitstring, or may be any kind of computing or talking or thinking hooked into the network.

This will be an experiment in "punish the nonpunishers" kind of gametheory. Those who observe errors in the network and continue routing on those paths, communicating along those peer bit vars as if there was no error, inherit the error, at least in my strategy of how I'll choose who to stay connected to or disconnect from my list of peers. Others may connect and disconnect to anyone in the full Internet, as usual, but somehow a gametheory should form where anything that leads to an error is itself an error, recursively. Thats punish the nonpunishers. Not punish as in the physical world or to hack or attack but instead to disconnect from any errors so the network tends toward less errors as defined by the nand and xor logic. There is no interpretation about if 2 bit vars/addresses are in an error state (directly between eachother) or not because its directly observable in their nand bits each about the other var not equalling.

This network has the consistency of a database and the speed of being lower level than assembly code.

This network, which I'm calling xorlisp (in progress), is a virtualization layer for all possible digital and statistical computing, and may extend to wave based computing using the bits of the numbers representing those waves or hopefully the way the hops are done leaving you uncertain which bit value you are as a relative bit value, will vibrate as those waves and we can fine tune it later.

The kind of hardware which would best calculate this network is a rows and columns breadboard with bitvar gate on each diagonal cell and in 32 (or more when variable size address) places, 1 from each of 32 wires coming out of it (or maybe same wire in some more statistical or wave base ways of using it) 2 wires are connected, maybe in gradual amounts like a piece of metal sliding more up or down, maybe like a keyboard having 2 sheets of such rows and columns separated by a middle nonconducting sheet with holes where the keys push. Or maybe some components would go at those 32 places each. Could be parallella chips on the diagonal, abstracting to multiple bit vars per such group, or could be any component. Breadboards would be more like phonebloks if they could snap onto eachother as an L shape expanding the square and the wires connect on all the sides.

The first such motherboard may have 65536 (16 dimensions plus the number of bits per cell chip) parallella chips or something like it, depending on if they can connect in this powerset shape. They normally are a flat 2d grid. This is a flat many dimensional grid.

Parallella chips (which are 1 of many possible ways to use this kind of network) cost "less than 5 dollars", I read somewhere, and the existing boards are also cheap but have too few chips only 16 or 64. Think volume discount when its easier to mass produce than prototype. Might they get down to a few cents each? Or maybe we dont need all that logic and can build it from simpler parts or existing languages.