Nice to see some enthusiasm again ; you're welcome ninlar
Allow me some digression and miscellaneous thoughts.
*coin mining is a nonsense to me.
As the world becomes hotter due to human activity, as for example the datacenters consume today as much as a whole country,
*coin mining won't help. (Nor the millions of GPU for video games, or my single-core 72 W or full-throttling 140 W CPU)
Moreover I recently told to myself "The solution is not technical, Parallella or whatever. If politicians/people ignore the issue, nothing will change.
If today we use N watts per country(/people) and nobody says "we must use N' watts in 2020... 2025..." (N' < N)
then the Parallella (or whatever) will be used to have MORE computations but THE SAME number of watts.
That makes me sad ; and I never loved politics but global changes partly depend on it.
Nevertheless for technical reasons I love Parallella too, and for technical reasons I might compare a CPU *coin miner with a Parallella *coin miner, just for curiosity.
And I found it the most energy efficient platform for basic integer operations and backtracker algorithms (compared to a GPU, two high-end x86-64 computers, Raspberry Pi 3, Odroid XU4).
And since Epiphany V is over :'( I am trying again to learn about the FPGA thing (myHDL among others).
More than money imo: making it an ASIC is a tremendous challenge, Andreas was one of the rare people (genius) that could do it.
A 300/400 $ Parallella IV would have been an affordable alternative: for clusters it's better to get 1 Parallella IV instead of 4 Parallella III... obviously.
Flops per watt, number of cables, wires... obvious.
There is already a *coin miner in the examples: riecoin.
Here is what you can get from the Zynq 7020 on a (standard 1602) Parallella III :
Programmable Logic Cells 85K
Look-Up Tables 53,200
Flip-flops 106,400
Extensible Block RAM 140 * (32 or) 36 Kb (Kbits) = 560KB -- these Block RAM may be split by two halves, configured for a SDP (Simple Dual-Port) design.
Programmable DSP Slices 220
What I currently ignore is the number of logic items used by the 16-core Epiphany.
Anyway I'll start with no Epiphany first - with FPGA the less challenges the better.
I give you these information because I've read from FPGA experts that it's the very first step to do for programming hardware - not intuitive for software programmers, isn't it.
With my best wishes