Now that the Parallella board design is finally stabilizing we are ready to release rev-zero of the Parallella Reference Manual (PDF). This document should be considered an initial rough draft and there are bound to be some typos and mistakes (only a few eyes have reviewed it so far). We felt it was important to get the information out to you as quickly as possible for review and hope you will forgive us (or filter out the errors automatically while reading as I do).
We need immediate feedback in the following areas:
- PEC_POWER/PEC_FPGA expansion connectors. Please tell us if there were features in the specifications that aren’t really that useful. In addition, of course please tell us if there are features missing.
- Choice of the Samtec expansion connector.(mechanics, expansion card applicability, and ease of use)
- Placement of expansion connectors on the bottom side of the board?
- What kind of daughter cards do you want to see? (breakout board, loop back board, etc)
- Missing or unclear documentation for key board features.
- Anything else?
At this point we feel pretty good about the design, but if there are strong and valid objections to our approach, we will definitely listen to make sure we get the design right.
In addition to the Parallella manual we have also decided to publish the Epiphany-III Datasheet (PDF) so that you now have open information access to all major ICs on the Parallella board. (There is still one IC on the board that requires an NDA for datasheet access, but the vast majority of users won’t care. We are hopeful that the company that makes this particular IC will eventually open up the datasheet to the public).
In our mission to deliver the Parallella open computing platform will be to publishing the Epiphany SDK driver and library sources to github by the end of next week. (In case you hadn’t noticed, the sources for the Epiphany SDK and OpenCL SDK from Brown Deer Technology are already available on github).
