Parallella Community

Hi,

in my current code, I use a (packed) structure beginning with some int32_t variables to communicate the current Epiphany core states to the host. The host is endlessly reading this part of the structure until it changes (and only then will read all of the shared memory). As soon as the Epiphany tries to set the value from e.g. zero to -1, the host reads 0x000000ff, 0x0000ffff, 0x00ffffff, 0xffffffff in that order, sometimes missing one or two. But it always reads intermediate values.

I though 32-bit accesses to the shared DRAM would be atomic, but this looks to me like Epiphany does 8-bit transfers. How is the correct way to communicate atomically between Epiphany and Host, or what am I missing here? (Preferably, I would like to be able to send an interrupt/signal to the host application, but I did not find any possibility to do so.)

Best Regards,
Sebastian

Is the value aligned in the struct? Maybe the compiler is writing it out in bytes because you asked for it due to packing it.

what about the machine code?

One easy way to identify assembly blocks is move just what you need into a stand-alone non-static function that isn't called anywhere. The compiler will leave it in and wont try to inline optimise it, but you can see what it compiles stuff into. It's not perfect as the optimiser may do other things in-context but it works pretty well.

At least in this case ... the disassembly is showing very obviously exactly what's going on which is always better than second-guessing the compiler.

First just try removing the packed. If you know the packing rules you can make compatible structures - they are almost the same except that anything 8-bytes or larger is 8-byte aligned (e.g. double, long, sub-struct or even a sub-array).

At worst, just create a function who's purpose is just to write that value and put it in another compilation unit (so it isn't inlined and 'optimised') , but you shouldn't need to do that.

e.g. void writeflag(int *p, int v) { *p = v; }

BTW I think this forum is about the hardware itself, not programming it.

moving post to Q&A

In the meantime, I changed the "states" array to a single 32-bit variable, which doesn't change anything.

Removing the packed helps, and so does changing the variable type to uint64_t. So thanks for your help!

But I am still wondering: Why did the compiler decide to do byte-accesses in the first place? I always thought that 32-bit accesses to the DRAM should be atomic, since on both ends I have a 32-bit architecture?
What alignment restrictions do I have to get only single-cycle accesses to shared memory, without manually always checking the assembly code? Changing the structure is easy, but I would like to enforce that decision to avoid breakage later. Since the header file is shared between the host and the target, I packed the structure. (I've seen code breaking on prototypes, because the 32-bit Epiphany did a different alignment than the 64-bit host, and unfortunately the latter depended on compiler version and options.) Are there any guidelines?

Thanks for your time, I hope not to be a bother.