Parallella Community

I'm not sure if this is really relevant but I need to ask the question.

AMD and a number of other vendors have teamed-up in the HSA initiative ( Heterogenous System Architecture ) After reviewing a number of video's and reading a bit here and there i'm curious if this HSA would fit the parallella/epiphany designed boards. Will there be an evolution towards HSA ?

From my helicopter perspective it seems HSA has all characteristics and properties of 'a winner' since it eliminates a number of hurdles for programmers especially. Given there seems to be a similar 'specialist divide' on programming for the parallella board i thought it worth asking this question.

http://www.hsafoundation.com/

I understand that Andreas , but I'm not aware of any particular strategy in this area.

Cheers,

Andrew

Good to hear, especially with stacked set-ups and the growpath to 1024 cores this could prove a win for parallella. Might be worth to source with existing members as a parallella/epihany co-processor card of some sort ?

All the best for 2015.

I think it's a fairly good fit for the most part - however there may be some problems creating a full fit for the minimum profile (just going on memory, it's been a few months since I was looking closely).

The global memory space is probably the biggest one: I'm pretty sure baseline HSA support requires global (virtual) pointers which an be shared amongst processing units, and some (whatever they are) coherency guarantees. So this would probably force any implementation to be non-conformant but probably wouldn't be a deal-breaker as such. Not sure about memory transfers though i.e. just accessing global memory using pointers is too slow to be worth worrying about.

I think from memory the event/scheduling stuff should be pretty doable which is at least something.

The other thing ... it's just such a damn big problem. The biggest part is a BRIG finaliser which is essentially a virtual bytecode compiler but the bytecode is rather large and complex. I think AMD have finally just released a binary finaliser for the GCN cards but I was hoping they'd come up with a public source reference implementation for a plain cpu since that's always a good resource for "what does it actually mean", not to mention all the frontend/BRIG stuff. It's kind of a pity that the hsa architecture is essentially aimed at "public compiler, proprietary finaliser" on purpose and that's probably what we'll end up with. I don't know if the compiler is even there yet - last i tried gcc's hsa stuff was still in early alpha and experimental stages.

I _was_ going to have a look at trying to implement the event/messaging model of HSA using ezesdk which would have provided a good feasibility study, ... but i was going to do lots of things and never got around to those either. I think I was discouraged (amongst other reasons) by the terrible hsa website and woeful "documentation repository" at the time. I actually bought a kaveri machine in order to play with HSA but the software side has been severely lacking (and i haven't looked at the latest stuff recently announced).

Thank you for the very informative response.

After review on http://www.hsafoundation.com it appears the HSA Open-Source developer program is still under way.