Parallella Community

Q1 can ARM read the epiphany on-chip memories.
(i know there's a 32mb shared area both can see)

I realise the grid may well clash with the address layout ARM expects.

Q2 if the answer is no, could the FPGA be configured to achieve this - perhaps the cores could show up at a different location in the ARM address space

Q3 can the FPGA DMA to & from anywhere in 'main memory' (the 1gb DDR) & the epiphany cores local-memories

Q4 what are the official terms for those ( i use the terms 'main memory','system memory' for the former, and 'local-store' or 'scratchpad')