The Hardware Loop Feature

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

Re: The Hardware Loop Feature

Postby ysapir » Wed May 15, 2013 3:22 pm

User avatar
ysapir
 
Posts: 393
Joined: Tue Dec 11, 2012 7:05 pm

Re: The Hardware Loop Feature

Postby shodruk » Wed May 15, 2013 4:21 pm

How about this?

gcc -c -O3 -funroll-loops small_core.c
gcc -c -Os big_main.c
gcc big_main.o small_core.o
Shodruky
shodruk
 
Posts: 464
Joined: Mon Apr 08, 2013 7:03 pm

Re: The Hardware Loop Feature

Postby ysapir » Wed May 15, 2013 9:10 pm

User avatar
ysapir
 
Posts: 393
Joined: Tue Dec 11, 2012 7:05 pm

Re: The Hardware Loop Feature

Postby Folknology » Thu May 16, 2013 10:48 am

The hardware loop features do look useful for really tight hardware based loops (real time patternmatching/protocol work) and with 'interrupt-vectoring out' I could imagine some interesting zip port pattern type scenarios taking full advantage.

regards
Al
User avatar
Folknology
 
Posts: 36
Joined: Mon Dec 17, 2012 3:25 am


Return to Epiphany and Parallella Q & A

Who is online

Users browsing this forum: No registered users and 22 guests