Parallella Community

These are:

* FEXT
* FDEP
* LFSR
* FRECIP
* FSQRT
* SWI

I might have missed others...

For what it's worth: From what I've gathered, SWI is just an operand-less instruction that sets ILAT[9]=1, thus causing a user interrupt. Kind of a big deal that this one in particular isn't documented.

Looking at src/cpu/epiphany.cpu SWI is meant to take a 6 bit unsigned number, the same as TRAP. However e-as only seems to accept SWI 0.

Perhaps this opcode isn't properly tested or has been found to have bugs? It would be useful to have working if the hardware supports it correctly. This sort of instruction tends to be used to implement Operating System routines.

Tim

Alex,
You can ignore those opcodes. SWI exists in hardware, but hasn't been properly tested yet...
The rest of the instructions are ghosts and should be removed from binutils.
Andreas

So the correct way to trigger a user interrupt today is to write to ILAT[9], right? Presumably that's what SWI will do if/when it becomes a supported instruction?

Andreas, can you elaborate a bit on the encoding of SWI? I know it's not supported/documented yet, but it can't hurt to have the support there in my simulator.