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These are listed in the decode table as having Rm operands, but they of course don't.

For hardware reasons, the decoder of these instructions requires that the RM field is set to 00000

Is that an architectural requirement, or is it just an implementation restriction that will be lifted in the future?

In any case, I think those bits should be explicitly listed as all 0 (if this is indeed architectural) or just be omitted.

Sorry, neuron misfire..

The restriction is that the RM field has to be plugged with the same value as the RN field and yes, this is going to be a hard limitation in all implementations.(makes hardware more efficient..)

OK. Please be sure to document that somewhere as that's a somewhat subtle detail. :)

Thanks!