Memory Architecture

[mxfreak]

Hi,

as far as i know: The local memory space of each eNode has 4 internal banks, reserved space and memory-mapped registers?!

1. For what is the reserved space used? What is the intention of reserved space?

2. The memory-mapped register space is only a space for registers helping the RISC CPU for calculation etc. right?

Best regards,
mx

[timpart]

1. Reserved space is reserved for future use in later versions of the chip. So if one day they produce a chip with 64k RAM they will use some of the reserved addresses and make them available for use. In the meantime don't access any space marked as reserved for chip you have. (Where a register has some bits reserved, only write 0 in those bit positions.)

2. The memory mapped registers include the registers R0 to R63 made available in memory locations. This is to help with debugging. If a core is put into a halt state by a debugger, it is then possible for another processor to access those memory locations and find out the contents of the registers. The registers must not be accessed when a core is running. Various other control registers are available in the memory map too.

Tim

[mxfreak]

Thanks a lot!

[mxfreak]

Hello,

some more questions appeared:

1. In Epiphany Architecture Reference Manual (PDF) page 11: Each routing link can transfeer up to 8 bytes of data on every clock cycle, allowing 64bytes of data flow through every routing node on every clock cycle.
Does "routing link" considering the cMesh-network only? How to come about 64 bytes of data flow? I thought of 5 connections (to NEWS + to mesh node interface) but there is no way for calculation to get 64bytes?!

2. Statement: The 12 bit for coordinate based addressing scheme allows addressing 4095 cores.
But I also read that the processing system provides broadcasting of data to processing nodes by columns, rows, (planes -> I think 3D modelling is not topical) and/or to all of the processing nodes using a single data transaction.
So the Core-ID's e.g. 111111000000 (row broadcast), 000000111111 (column broadcast) are not available for ID's or?
Therefore: Is it right, that you can't address 4095 cores while using the broadcast concept?

Kind regards,
mx

[mxfreak]

Nobody any idea?

[timpart]

[notzed]