epiphany V external bandwidth

Any technical questions about the Epiphany chip and Parallella HW Platform.

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epiphany V external bandwidth

Postby dobkeratops » Fri Feb 24, 2017 1:11 pm

I gather people report the parallela board was bottlenecked by external memory,

Is the theoretical bandwidth of the 1024-core epiphany V significantly improved - how would it compare to similar GPUs for example. (or is this information still secret)

I gather the longterm plan with this architecture is to have huge amounts of onchip stacked memory directly on each core, but it seems in the present day off chip bandwidth is going to remain important
Last edited by dobkeratops on Tue Mar 07, 2017 10:40 pm, edited 1 time in total.
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Re: epiphany V external bandwidth

Postby Mukti » Fri Mar 03, 2017 9:08 am

dobkeratops wrote:I gather the longterm plan with this architecture is to have huge amounts of onchip stacked memory

...reminds me of this article on ReRAM
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