GPIO P11/N11 voltage

Any technical questions about the Epiphany chip and Parallella HW Platform.

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GPIO P11/N11 voltage

Postby wiegmink » Wed Aug 16, 2017 10:38 am

Hi all,

In our design we use UART 2 routed via EMIO to GPIO pins P11 and N11 (single ended). The voltage level is 2.5V and for a while we thought we could change it to 3.3V. Far more convenient for UART I/O. After a closer look: GPIO11_P and GPIO11_N are on Bank 35 (Bank 32 in the parallella_manual.pdf, typo?), bank 35 is connected to LDO2 of U29 (ISL9307) and the output levels of this device cannot be changed. (I can change LDO2 of ISL9305 connected to bank 13 and 34, but it doesn't help and it looks like a bad idea anyway.) FYI I'm now using the 7020 but we have to change to the 7010 (7020 not available anymore) and all other pins are already in use.

Is my analysis correct?

Thanks.
Cheers,
Klaas
wiegmink
 
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