Hardware solution for CH A/D converters

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

Hardware solution for CH A/D converters

Postby CANGRKE79 » Fri Nov 17, 2017 9:35 am


Can I use this CH A/D converters ( https://www.icrfq.com/part/2439337-AD7606BSTZ.html )? (We have need 10's microseconds latency range. I'm not sure the IO pins is 48 supported or less?)
If simultaneously sampled inputs True bipolar analog input ranges: ±10 V, ±5 V Single 5 V analog supply, and 2.3 V to 5 V VDrive integrated data acquisition solution analog input clamp protection, input buffer with 1 MΩ analog input impedance second-order antialiasing analog filter On-chip accurate reference and reference buffer 16-bit ADC with 200 kSPS on all channels Oversampling capability with digital filter flexible parallel compatible Performance. I found this information on their datasheet. But I'm not sure is it would be the better choice, can anyone suggest me the specific solution?
Posts: 3
Joined: Fri Nov 03, 2017 6:21 pm

Return to Epiphany and Parallella Q & A

Who is online

Users browsing this forum: No registered users and 4 guests